search for: liveregunit

Where is the liveness analysis pass? I have been looking for days but cannot find anything. I just want to know transfer variables in and out of basic blocks, that are calculated using simple data flow equations. Thanks! -------------- next part -------------- An HTML attachment was scrubbed... URL: <http://lists.llvm.org/pipermail/llvm-dev/attachments/20180920/529bce15/attachment.html>

...talk about the machine representation: > - The register allocators use the LiveIntervals analysis (there is also > LiveVariables but that is deprecated, please don't use it). > - When register allocation is done we keep the block live-in lists around > and you can use LivePhysReg or LiveRegUnits to recompute the liveness > information in the middle of a basic block when necessary. > - The RDF framework in lib/Target/Hexagon performs a dataflow analysis > post-regalloc to determine values in physical registers. > > - Matthias > > > On Sep 20, 2018, at 11:31 AM, Ja...

On Oct 8, 2013, at 2:06 PM, Akira Hatanaka <ahatanak at gmail.com> wrote: > What I didn't mention in r192119 is that mthi/lo clobbers the other sub-register only if the contents of hi and lo are produced by mult or other arithmetic instructions (div, madd, etc.) It doesn't have this side-effect if it is produced by another mthi/lo. So I don't think making mthi/lo clobber the

Hi, I'm a bit unsure of the semantics of undef physical registers. The explanations I've seen in the code and in the langref seems to pertain more to constant values and virtual registers. What I really want to achieve is a push-pop of a register to have a temporary to work with, without having to check if this register is defined or not. However, whenever the reg is not defined before