search for: liveintervals

...after Simple Register Coalescing. But I encounter a fatal error "regalloc = ... not currently supported with -O0". I use command line with opt level O2, not O0. The probable reason of this error is that no LiveInterval information for newly MBB which is used by Register Allocation. And, LiveIntervals depend on LiveVariables which require the machine function to be in SSA form. However, in this case, the modified machine function(including newly inserted MBB) is not SSA form any more. So, how to update LiveInterval information of newly MBB? Could someone help me with that? Thank you very much in...

...achineInstr?)"' failed. has this following call stack: #3 in llvm::LiveInterval::addRangeFrom (this=0x46e99a0, LR=..., From=0x46ee4b0) at lib/CodeGen/LiveInterval.cpp:266 #4 in llvm::LiveInterval::addRange (this=0x46e99a0, LR=...) at include/llvm/CodeGen/LiveInterval.h:384 #5 in llvm::LiveIntervals::HMEditor::moveInternalFrom (this=0x7fffffff8010, OldIdx=..., P=...) at lib/CodeGen/LiveIntervalAnalysis.cpp:1220 #6 in llvm::LiveIntervals::HMEditor::moveAllInternalFrom (this=0x7fffffff8010, OldIdx=..., Internal=...) at lib/CodeGen/LiveIntervalAnalysis.cpp:1226 #7 in llvm::LiveIntervals::HME...

...after Simple Register Coalescing. But I encounter a fatal error "regalloc = ... not currently supported with -O0". I use command line with opt level O2, not O0. The probable reason of this error is that no LiveInterval information for newly MBB which is used by Register Allocation. And, LiveIntervals depend on LiveVariables which require the machine function to be in SSA form. However, in this case, the modified machine function(including newly inserted MBB) is not SSA form any more. So, how to update LiveInterval information of newly MBB? Could someone help me with that? Thank you very much in...

...t understanding what a "value number" is. When I think of "value number" I think of a web -- an intersection of def-use chains that relate to each other (mutliple defs reaching the same use, for example). Is this the LLVM definition of "value number" in the context of LiveIntervals? There's also the concept of "value number" in, for example, Global Value Numbering but that's not the same thing as LiveInterval "value numbers" as I understand things. -Dave

...9;t have any VLIW support, so nobody has thought about how best to do it. > Well, I would like to schedule the VLIW code after SimpleRegisterCoalescer, so that I get more or less the > final code to work with. As the instructions are rearrange, I suppose I must run the SlotIndexes and > LiveIntervals again. LiveVariables should also be refreshed as a register might get killed with a different > MI if two users change place, etc, I suppose. > > I would like to just rerun these passes, but you said below that LiveIntervals do not work after SSA form is > abandoned. > > I wonde...

...er that gets killed can be reused by another MI - these live ranges do not then overlap. Well, I would like to schedule the VLIW code after SimpleRegisterCoalescer, so that I get more or less the final code to work with. As the instructions are rearrange, I suppose I must run the SlotIndexes and LiveIntervals again. LiveVariables should also be refreshed as a register might get killed with a different MI if two users change place, etc, I suppose. I would like to just rerun these passes, but you said below that LiveIntervals do not work after SSA form is abandoned. I wonder how you mean to update the l...

Thanks Matthias I can also use the method intervalIsInOneMBB() from LiveIntervals class to relate a LiveInterval to a MachineBasicBlock, right? Em 04/09/2015 2:26 PM, "Matthias Braun" <mbraun at apple.com> escreveu: > There is no direct support for this, but you can use > LiveIntervalAnalysis::getMBBStartIndex()/getMBBEndIndex()/getMBBFromIndex() > to r...

I though LiveVariables may be invalidated by LiveIntervals, but it's declared not: void LiveIntervals::getAnalysisUsage(AnalysisUsage &AU) const { AU.addPreserved<LiveVariables>(); AU.addRequired<LiveVariables>(); ... LiveInterval may coalesce virtual registers and remove identity moves instructions: bool LiveIntervals::runOnMa...

On Jan 4, 2014, at 4:38 AM, Haishan <hndxvon at 163.com> wrote: > At 2014-01-04 06:11:38,"Jakob Stoklund Olesen" <stoklund at 2pi.dk> wrote: > > On Jan 3, 2014, at 1:52 PM, Andrew Trick <atrick at apple.com> wrote: > >> He really just wants to rerun LiveIntervals analysis, but LiveVariables is no longer available. Would it work just to clear all the intervals rerun LiveIntervals::computeVirtRegs after all the CFG transforms are complete? > > Yes, I should think so. > > /jakob > > > Thank you very much for your talk. > I think I c...

On Jan 16, 2008, at 11:49 AM, David Greene wrote: > I had been assuming that give a LiveRange a, a.valno->def, if > valid, would be the same as a.start. But this is apparently not > always the case. For example: > > Predecessors according to CFG: 0x839d130 (#3) 0x8462780 (#35) > 308 %reg1051 = MOV64rr %reg1227<kill> > 312 %reg1052 = MOV64rr %reg1228<kill>

...replace all virtual registers by assigned physical registers. I see different options for doing it: a) Normally, I'd use the spiller provided by the VirtRegMap class. But currently, it assumes that live register has only one physical register assigned to it. b) It could be possible to change LiveIntervalsAnalysis so that it creates a new LiveInterval for each live range. But this will probably have a negative impact on performance and also reduce coalescing possibilities. c) May be LiveIntervals could be split after register allocation, just before rewriting? How this could be easily done? May be P...

On Jan 3, 2014, at 1:52 PM, Andrew Trick <atrick at apple.com> wrote: > He really just wants to rerun LiveIntervals analysis, but LiveVariables is no longer available. Would it work just to clear all the intervals rerun LiveIntervals::computeVirtRegs after all the CFG transforms are complete? Yes, I should think so. /jakob -------------- next part -------------- An HTML attachment was scrubbed... URL: <htt...

...llocator (-regalloc=pbqp), whereas LLVM uses linear scan by default (-regalloc=linscan). That's why you're not seeing it called. LLVM does not currently have an interference graph as such, because we do not have a graph coloring register allocator. You can get the same information from the LiveIntervals pass though. The LiveIntervals pass holds a set of LiveInterval objects, one for each register (both virtual and physical) that is live in the function. Each LiveInterval object describes the set of instructions for which its register is live. The LiveInterval::overlaps method will tell you whether...

...ant to transform: ... %vreg1 = V_MOV_B32 1 %vreg2 = V_ADD_I32 %vreg1, %vreg0 ... into: %vreg1 = V_MOV_B32 1 ; <- Only delete this if it is dead %vreg2 = V_ADD_I32 1, %vreg0 For best results, I am trying to run this pass after the TwoAddressInstruction pass, which means I need to preserve the LiveIntervals analysis. My question is: How do I update the LiveIntervals to reflect the fact that V_ADD_I32 no longer uses %vreg0? Thanks, Tom

Hello to all LLVM Developers. Given a object from a LiveInterval class, is there any way to know if this Live Interval is part or is inside a loop? Att -- Natanael Ramos Membro do corpo discente de Ciência da Computação pelo Instituto Federal de Minas Gerais - Campus Formiga -------------- next part -------------- An HTML attachment was scrubbed... URL:

...have a 'usual' pass, which can be used by the 'opt' tool, we can just pass the '-analyze' command line argument but what about the 'llc' compiler? As I can see, there is an implementation of the 'print(raw_ostream &OS, const Module*)' method in the 'LiveIntervals.cpp'. void LiveIntervals::print(raw_ostream &OS, const Module* ) const { OS << "********** INTERVALS **********\n"; // Dump the regunits. ... The method also is implemented in 'RegisterCoalescer.cpp' (in fact, this method just invokes one from LiveIntervals)....

...>>>> >>>> At 2014-01-01 04:36:21,"Andrew Trick" <atrick at apple.com> wrote: >>>> >>>> On Dec 31, 2013, at 3:52 AM, Haishan <hndxvon at 163.com> wrote: >>>> My update steps are shown following: >>>> LiveIntervals *LIS = &getAnalysis<LiveIntervals>(); >>>> 1. LIS->insertMBBInMaps(NewMBB) >>>> 2. LIS->InsertMachineInstrRangeInMaps(NewMBB->begin(), NewMBB->end()) >>>> 3. Due to some machine instructions of NewMBB copy from OldMBB, I have to...

...ical registers. I > see different options for doing it: > > a) Normally, I'd use the spiller provided by the VirtRegMap class. But > currently, it assumes that live register has only one physical > register assigned to it. Right. > > > b) It could be possible to change LiveIntervalsAnalysis so that it > creates a new LiveInterval for each live range. But this will probably > have a negative impact on performance and also reduce coalescing > possibilities. Not to mention it will significantly increase memory usage. > > > c) May be LiveIntervals could be spli...

I had been assuming that give a LiveRange a, a.valno->def, if valid, would be the same as a.start. But this is apparently not always the case. For example: Predecessors according to CFG: 0x839d130 (#3) 0x8462780 (#35) 308 %reg1051 = MOV64rr %reg1227<kill> 312 %reg1052 = MOV64rr %reg1228<kill> 316 %reg1053 = MOV64rr %reg1229<kill> 320 %reg1054 = MOV64rr

...hich it is dead. A traditional live variable analysis would say that x and y do not interfere. However, what happens if the linear ordering of instructions puts block C before block B? Then it seems to me that the live intervals overlap and we'd see a false interference. Does the ability of LiveIntervals to have holes in them take care of this problem? Let's say block A has instructions 1-10, block C 11-20 and block B 21-30 and that x is defined at instruction 1 and last used at instruction 30. Let's say y is defined at instructions 11 and last used at instruction 20 What do the LiveInte...