search for: littlearm

Displaying 8 results from an estimated 8 matches for "littlearm".

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2010 Jul 12
2
[LLVMdev] build errors while cross compiling llvm-gcc for ARM
> ld-new works only with those objects which are compiled using native gcc but > doesn't work for cross-compiler gcc/arm. Ok, please show: ld --version and last few lines of the ld --help output -- With best regards, Anton Korobeynikov Faculty of Mathematics and Mechanics, Saint Petersburg State University
2010 Jul 12
0
[LLVMdev] build errors while cross compiling llvm-gcc for ARM
Did you mean ld-new ? ld-new -v GNU gold (GNU Binutils 2.20.51.20100707) 1.9 ld-new --help ./ld-new: supported targets: elf32-i386 elf32-i386-freebsd elf64-x86-64 elf64-x86-64-freebsd elf64-sparc elf32-sparc elf64-powerpcle elf64-powerpc elf32-powerpcle elf32-powerpc elf32-bigarm elf32-littlearm On Mon, Jul 12, 2010 at 6:52 PM, Anton Korobeynikov <anton at korobeynikov.info > wrote: > > ld-new works only with those objects which are compiled using native gcc > but > > doesn't work for cross-compiler gcc/arm. > Ok, please show: > > ld --version > and...
2012 Jul 18
0
[LLVMdev] Setting up a cross-compiler for cortex-m3
...ot, as it finds it all by itself. And the winner is.. clang++ -ccc-gcc-name arm-none-linux-gnueabi-g++ -ccc-host-triple thumbv7m-none-gnueabi testReference.cpp -c It seems like it worked. $ arm-none-linux-gnueabi-objdump -D --section=.text testReference.o testReference.o: file format elf32-littlearm Disassembly of section .text: 00000000 <main>: 0: e92d4800 push {fp, lr} 4: e1a0b00d mov fp, sp 8: e24dd030 sub sp, sp, #48 ; 0x30 ... I'm not 100% sure if that's the correct ISA, because I haven't run the code, but it seems ok. I of course own you a beer :-) Than...
2012 Jul 18
3
[LLVMdev] Setting up a cross-compiler for cortex-m3
On 18 July 2012 15:46, salvatore benedetto <salvatore.benedetto at gmail.com> wrote: > $ clang++ -ccc-host-triple thumbv7m-none-gnueabi noInclude.cpp -c > --sysroot=/home/emitrax/CodeSourcery/Sourcery_G++_Lite/arm-none-linux-gnueabi/libc/ Try -ccc-gcc-name arm-none-linux-gnueabi-g++ -ccc-host-triple thumbv7m-none-linux-gnueabi Sometimes it's better than sysroot, as it finds it
2010 Jul 12
2
[LLVMdev] build errors while cross compiling llvm-gcc for ARM
...> ld-new -v > GNU gold (GNU Binutils 2.20.51.20100707) 1.9 > > ld-new --help > ./ld-new: supported targets: elf32-i386 elf32-i386-freebsd elf64-x86-64 > elf64-x86-64-freebsd elf64-sparc elf32-sparc elf64-powerpcle elf64-powerpc > elf32-powerpcle elf32-powerpc elf32-bigarm elf32-littlearm > > > > > On Mon, Jul 12, 2010 at 6:52 PM, Anton Korobeynikov < > anton at korobeynikov.info> wrote: > >> > ld-new works only with those objects which are compiled using native gcc >> but >> > doesn't work for cross-compiler gcc/arm. >> O...
2012 Jul 22
3
[LLVMdev] Setting up a cross-compiler for cortex-m3
...e winner is.. > > clang++ -ccc-gcc-name arm-none-linux-gnueabi-g++ -ccc-host-triple > thumbv7m-none-gnueabi testReference.cpp -c > > It seems like it worked. > > $ arm-none-linux-gnueabi-objdump -D --section=.text testReference.o > > testReference.o: file format elf32-littlearm > > > Disassembly of section .text: > > 00000000 <main>: > 0: e92d4800 push {fp, lr} > 4: e1a0b00d mov fp, sp > 8: e24dd030 sub sp, sp, #48 ; 0x30 > ... > > I'm not 100% sure if that's the correct ISA,...
2018 Jan 10
3
llvm-mc assembler, GNU as, and pc-relative branches for Arm/AArch64/Mips
...c: 10 00 00 1a bne #64 <lab+0x54> No relocations are produced and the immediate argument is clearly interpreted as a pc-relative offset. Assembling and objdumping the same program with the gcc-arm-non-eabi-7-2017-q4-major toolchain (no arguments to as): a.out: file format elf32-littlearm Disassembly of section .text: 00000000 <lab>: 0: 0afffffe beq 80 <*ABS*0x80> 0: R_ARM_JUMP24 *ABS*0x80 4: 1afffffe bne 40 <*ABS*0x40> 4: R_ARM_JUMP24 *ABS*0x40 8: 0afffffe beq 80 <*ABS*0x80> 8: R_ARM_JUMP24 *AB...
2016 Sep 07
5
[LLD] Writing thunks before the corresponding section
Hi, MIPS LA25 thunk is used to call PIC function from non-PIC code. Usually it contains three instructions: lui $25, %hi(func) addiu $25, $25, %lo(func) j func We can write such thunk in an arbitrary place of the generated file. But if a PIC function requires the thunk is the first routine in a section, we can optimize the code and escape jump instruction. To do so we just write the