Displaying 3 results from an estimated 3 matches for "linearscanregalloc".
2010 May 04
0
[LLVMdev] Register Allocation: Interference graph
...ilar is
> possible with opt but I can't figure it out with llc.
Passes in llc are hard-coded in LLVMTargetMachine.cpp. Does your
pass actually do register allocation, or will it? If so, you want
to use the RegisterRegAlloc object. Here is how linear scan uses it:
static RegisterRegAlloc
linearscanRegAlloc("linearscan", "linear scan register allocator",
createLinearScanRegisterAllocator);
Then createRegisterAllocator in CodeGen/Passes.cpp will pick up
your allocator and list it as an option under -regalloc=<allocator>.
If you pass is just doing some anal...
2010 May 04
4
[LLVMdev] Register Allocation: Interference graph
David Greene wrote:
> On Saturday 01 May 2010 08:34:50 Josef Eisl wrote:
>> Hello,
>>
>> I want learn more about register allocation and do some analysis for a
>> current research project. After reading some papers (eg. Chaitin,
>> Briggs) I think its time to get my hands dirty :).
>
> Welcome!
>
>> First I plan to (re)implement some of the classic
2017 Jun 21
6
RFC: Cleaning up the Itanium demangler
..."},
{"_ZL12fastRegAlloc", "fastRegAlloc"},
{"_ZL12NewHeuristic", "NewHeuristic"},
{"_ZL17PreSplitIntervals", "PreSplitIntervals"},
{"_ZL16TrivCoalesceEnds", "TrivCoalesceEnds"},
{"_ZL18linearscanRegAlloc", "linearscanRegAlloc"},
{"_ZN12_GLOBAL__N_1L19NumRecentlyUsedRegsE", "(anonymous namespace)::NumRecentlyUsedRegs"},
{"_ZL14ShrinkWrapping", "ShrinkWrapping"},
{"_ZL14ShrinkWrapFunc", "ShrinkWrapFunc"},
{...