search for: lilotom

Displaying 19 results from an estimated 19 matches for "lilotom".

2012 Jun 21
1
[LLVMdev] Is NASM supported by LLVM?
...> If by "NASM format" you mean Intel syntax, then yes. In my experience most > LLVM tools refer to it with the option "-x86-asm-syntax=intel". For > example, tools/llvm-objdump has this flag. > > --Sean Silva > > On Wed, Jun 20, 2012 at 10:12 PM, Thomson <lilotom at gmail.com> wrote: > >> I saw some LLVM generated assembly in NASM format, but did find this >> support in the official release. Is this supported? >> >> -- >> Thanks >> Thomson Tan >> >> >> ______________________________________________...
2011 Oct 15
4
[LLVMdev] Is there a separate linker for LLVM in Windows?
I just found that some samples used link.exe from Visual Studio to generate the final image, does LLVM has a replacement for link.exe to generate the final binary? -- Thanks Thomson -------------- next part -------------- An HTML attachment was scrubbed... URL: <http://lists.llvm.org/pipermail/llvm-dev/attachments/20111015/1b33f012/attachment.html>
2011 Oct 15
0
[LLVMdev] Is there a separate linker for LLVM in Windows?
On Sat, Oct 15, 2011 at 7:38 AM, Thomson <lilotom at gmail.com> wrote: > I just found that some samples used link.exe from Visual Studio to generate > the final image, does LLVM has a replacement for link.exe to generate the > final binary? > > -- > Thanks > Thomson Not currently, but a linker is being worked on. Is there...
2012 Jun 21
0
[LLVMdev] Is NASM supported by LLVM?
If by "NASM format" you mean Intel syntax, then yes. In my experience most LLVM tools refer to it with the option "-x86-asm-syntax=intel". For example, tools/llvm-objdump has this flag. --Sean Silva On Wed, Jun 20, 2012 at 10:12 PM, Thomson <lilotom at gmail.com> wrote: > I saw some LLVM generated assembly in NASM format, but did find this > support in the official release. Is this supported? > > -- > Thanks > Thomson Tan > > > _______________________________________________ > LLVM Developers mailing list >...
2014 Jan 12
2
[LLVMdev] How are OutputOperandList and InputOperandList used?
I saw many definitions derived from Instruction defines OutputOperandList and InputOperandList (usually in the xxxInstrFormats.td), but I don't see where they are referenced. Anything I missed here? Thanks, -Thomson -------------- next part -------------- An HTML attachment was scrubbed... URL: <http://lists.llvm.org/pipermail/llvm-dev/attachments/20140112/e6e87e9f/attachment.html>
2014 Jan 19
2
[LLVMdev] Why make the register list a dag for RegisterClass in target descriptor file?
The blow snippet in target.td shows the regList in RegisterClass is typed as dag. Why not make it a simple list, such as list<Register>? class RegisterClass<string namespace, list<ValueType> regTypes, int alignment, dag regList> Thanks, -Thomson -------------- next part -------------- An HTML attachment was scrubbed... URL:
2015 Jan 01
2
[LLVMdev] What is dead def?
I saw there is reference to dead def on registers in LLVM source code. I am not aware of this concept from the traditional course material. What are the properties of dead def? Cheers Thomson -------------- next part -------------- An HTML attachment was scrubbed... URL: <http://lists.llvm.org/pipermail/llvm-dev/attachments/20150101/ea39d1e4/attachment.html>
2012 Jun 21
3
[LLVMdev] Is NASM supported by LLVM?
I saw some LLVM generated assembly in NASM format, but did find this support in the official release. Is this supported? -- Thanks Thomson Tan -------------- next part -------------- An HTML attachment was scrubbed... URL: <http://lists.llvm.org/pipermail/llvm-dev/attachments/20120621/c571b488/attachment.html>
2014 Dec 24
2
[LLVMdev] Generating code for target with immediate constant?
To generate code for a target which doesn't have immediate constant as instruction operand, do I (the target specific back-end, XXXTarget) need to provide code to break up the SDNode with constant (like ISD::ADD $reg1, #1) to 2 SDNodes (ISD::LOAD $reg2, #1; ISD::ADD $reg1, $reg2) in my XXXTargetLowering::LowerOperation, or LLVM target-independent framework can do such transformation
2012 Jun 17
5
[LLVMdev] Which pass converts call printf to puts?
I found that LLVM optimized the IR by replacing printf with puts. I wondered which pass did this optimization? And is it common that puts is faster (and some other metric) than printf? -- Thanks Thomson -------------- next part -------------- An HTML attachment was scrubbed... URL: <http://lists.llvm.org/pipermail/llvm-dev/attachments/20120617/08aa6c45/attachment.html>
2012 Jun 16
1
[LLVMdev] How to build an LLVM pass through visual studio
I tried to build an LLVM pass in visual studio with cmake, but it seems add_LLVM_loadable_module macro doesn't support non-unix and non-cygwin platform. Is loadable module necessary for LLVM pass? Could I just build a static library and pass it to opt? If static library is not supported, is there any way to build an LLVM pass through visual studio? Or through clang with cmake? -- Thanks
2014 Jan 19
0
[LLVMdev] Why make the register list a dag for RegisterClass in target descriptor file?
On 19 January 2014 10:19, Thomson <lilotom at gmail.com> wrote: > The blow snippet in target.td shows the regList in RegisterClass is typed as > dag. Why not make it a simple list, such as list<Register>? I don't know about the original reason, but these days we have a few operators in use to make constructing those sets...
2011 Oct 16
2
[LLVMdev] Is there a separate linker for LLVM in Windows?
On Sat, Oct 15, 2011 at 12:26 PM, Michael Spencer <bigcheesegs at gmail.com> wrote: > On Sat, Oct 15, 2011 at 7:38 AM, Thomson <lilotom at gmail.com> wrote: >> I just found that some samples used link.exe from Visual Studio to generate >> the final image, does LLVM has a replacement for link.exe to generate the >> final binary? I'm not related to the topic starter, but I see at least one huge disadvantage o...
2012 Jun 18
1
[LLVMdev] Which pass converts call printf to puts?
This makes sense now. So if the instruction doesn't make any assignment, it would be unnecessary to replace any operand reference and the same instruction(CI) would be returned from the inner function to avoid this replacement, is this right? Thanks, -Thomson On Mon, Jun 18, 2012 at 8:09 PM, Christoph Erhardt <christoph at sicherha.de>wrote: > Hi Thomson, > > > Could you
2012 Jun 23
1
[LLVMdev] Does call instruction (LLVM-IR) terminate a basic block?
I experimented to collect edge profile in llvm, and the report output by llvm-prof included call in the middle of the block. So it seems llvm-prof doesn't treat call as a basic block terminator, is this expected? Thanks, -Thomson -------------- next part -------------- An HTML attachment was scrubbed... URL:
2012 Jun 24
2
[LLVMdev] Does anaysis group only contain passes?
I found that ProfileInfo is contained in an analysis group, but ProfileInfo class itself is not derived from any base classes of passes, so it appears not to be a pass. Anything I missed here? Thanks, -Thomson -------------- next part -------------- An HTML attachment was scrubbed... URL: <http://lists.llvm.org/pipermail/llvm-dev/attachments/20120624/7f26ca93/attachment.html>
2012 Jun 18
2
[LLVMdev] Which pass converts call printf to puts?
Could you give an example of the old instruction cannot be removed safely? Since the new instruction would produce the same context/result of the old one, I suppose it is safe to remove the old one when the new instruction is ready (inserted after the old one). Anything I missed here? Thanks, -Thomson On Mon, Jun 18, 2012 at 7:31 PM, Christoph Erhardt <christoph at sicherha.de>wrote: >
2012 Jun 18
2
[LLVMdev] Which pass converts call printf to puts?
Ok. So it seems CI->eraseFromParent() removed the old instruction and the new one is inserted right after this one in the inner function in the case of printf->puts. There is another line CI->repalceAllUsesWith(Result). I think this line could also do the replacement besides inserting the new one in the inner function. What's the difference of these 2 replacement methods? Also
2012 Jun 26
2
[LLVMdev] Does anaysis group only contain passes?
Thanks, John. This sounds reasonable that the analysis group just provides an interface to its implementors (pass). Then I have another question, is it allowed to specify multiple pass in the same analysis group in the command line for opt? If yes, which pass will be used for the call of getAnaysis<AnalysisGroup>()? -Thomson On Mon, Jun 25, 2012 at 10:34 PM, John Criswell <criswell at