Displaying 7 results from an estimated 7 matches for "lhsknownon".
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lhsknownone
2011 Mar 08
0
[LLVMdev] First Patch
...t) the ripple may go up to and fill the zero, but won't change the
> // sign. For example, (X & ~4) + 1.
> -
> - // TODO: Implement.
> -
> +
> + unsigned width = LHS->getType()->getScalarSizeInBits();
> + APInt mask(width, -1, true), LHSKnownZero(width, 0), LHSKnownOne(width, 0),
> + RHSKnownZero(width, 0), RHSKnownOne(width, 0);
> +
> + ComputeMaskedBits(LHS, mask, LHSKnownZero, LHSKnownOne);
> + ComputeMaskedBits(RHS, mask, RHSKnownZero, RHSKnownOne);
> +
> + if (RippleBucketExists(LHSKnownZero, LHSKnownOne, RHSKnownZero, width))
> +...
2011 Mar 08
2
[LLVMdev] First Patch
Hi!
I've attached a patch which takes care of the issues mentioned (and adds
two tests).
--
Sanjoy Das
http://playingwithpointers.com
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2011 Mar 06
0
[LLVMdev] First Patch
...required to be equal for instructions like add. Just delete
this line.
> + APInt mask(width, 0), zeroes(width, 0), ones(width, 0);
These shadow (have the same name as) the ones before. It's better to
reuse the mask and rename the other two. The earlier ones should be
LHSKnownZero and LHSKnownOne and these should be RHSKnownZero and
RHSKnownOne. This is more consistent with the way they're named
elsewhere in LLVM.
> + mask.clearAllBits();
This is redundant here because it's already been initialized to zero
in the constructor. If you'd reuse the old mask variable as su...
2011 Mar 06
1
[LLVMdev] First Patch
Hi all!
I've been tinkering with LLVM's code-base for a few days, hoping to
start on one of the ideas mentioned in the "Open Projects" page (I was
told 'Improving the current system'/'Miscellaneous Improvements'/5 would
be a good start).
While I was at it, I also took a stab at finishing up one of the TODOs.
I've attached the patch for review.
--
2011 Mar 02
3
[LLVMdev] live variable analysis
Hi
As I understand live variable analysis will set the def/kill
properties of operands. In that case, is it still needed to set the
kill flags when possible during lowering?
thanks
dz
2009 Jul 29
0
[LLVMdev] Vector logic regression in r73431
...============================================================
--- InstructionCombining.cpp (revision 77486)
+++ InstructionCombining.cpp (working copy)
@@ -1014,7 +1014,7 @@
if ((DemandedMask & (RHSKnownZero|RHSKnownOne)) == DemandedMask) {
// all known
if ((RHSKnownOne & LHSKnownOne) == RHSKnownOne) {
- Constant *AndC = ConstantInt::get(*Context,
+ Constant *AndC = ConstantInt::get(VTy,
~RHSKnownOne & DemandedMask);
Instruction *And =
BinaryOperator::CreateAnd(I->getOperand(0), AndC, "...
2009 Jul 29
3
[LLVMdev] Vector logic regression in r73431
Hi All,
I found a regression which triggers the asserts: "Binary operator types must
match!" and "Op types should be identical!". It's happening with a piece of
vector code, and the asserts happen because a logic operation is attempted
between a vector and a scalar (which is not present in the original code,
but created by InstCombine).
It's caused by revision