Displaying 20 results from an estimated 47 matches for "lfunc_end0".
2020 Jul 15
2
[MTE] Tagging Globals
...main: // @main
.Lmain$local:
// %bb.0: // %entry
adrp x8, global_array
add x8, x8, :lo12:global_array
str wzr, [x8, #4]
add x8, x8, w0, sxtw #2
ldr w0, [x8, #64]
ret
.Lfunc_end0:
.size main, .Lfunc_end0-main
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2019 Jul 26
2
Stackmap offset computation on AArch64
...// @test
.cfi_startproc
// %bb.0: // %entry
str x30, [sp, #-16]! // 8-byte Folded Spill
.cfi_def_cfa_offset 16
.cfi_offset w30, -16
str x0, [sp, #8]
bl return_i1
.Ltmp0:
ldr x0, [sp, #8]
ldr x30, [sp], #16 // 8-byte Folded Reload
ret
.Lfunc_end0:
.size test, .Lfunc_end0-test
.cfi_endproc
The generated stackmap indicates that %ptr is located at offset -8 from the stack pointer, instead of the expected 8. After trying a few other configurations it happens that the offsets are computed relative to the stack pointer of the parent frame inst...
2020 Jun 01
3
Aarch64: unaligned access despite -mstrict-align
...0:
adrp x8, g
ldr x10, [x8, :lo12:g]
ldr x9, [x0]
ldr x8, [x10]
rev x9, x9
rev x8, x8
cmp x8, x9
b.ne .LBB0_3
// %bb.1:
ldr x8, [x10, #8]
ldr x9, [x0, #8]
rev x8, x8
rev x9, x9
cmp x8, x9
b.ne .LBB0_3
// %bb.2:
mov w0, wzr
ret
.LBB0_3:
cmp x8, x9
mov w8, #-1
cneg w0, w8, hs
ret
.Lfunc_end0:
.size f, .Lfunc_end0-f
// -- End function
.ident "clang version 10.0.0-4ubuntu1 "
.section ".note.GNU-stack","", at progbits
.addrsig
---8<-------8<-------8<-------8<-------8<-------8<-------8<-------
N...
2020 Jun 11
2
Issue with __attribute__((constructor)) and -Os -fno-common
.../dev/stdout | grep init_fn
$ clang --target=arm-linux-gnueabihf -Os -S ctor.c \
-o /dev/stdout | grep init_fn
.p2align 2 @ -- Begin function init_fn
.type init_fn,%function
.code 32 @ @init_fn
init_fn:
.size init_fn, .Lfunc_end0-init_fn
.long init_fn(target1)
.addrsig_sym init_fn
$ clang --target=arm-linux-gnueabihf -fno-common -S ctor.c \
-o /dev/stdout | grep init_fn
.p2align 2 @ -- Begin function init_fn
.type init_fn,%function
.code 32...
2020 Jul 15
2
[MTE] Tagging Globals
...main: // @main
.Lmain$local:
// %bb.0: // %entry
adrp x8, global_array
add x8, x8, :lo12:global_array
str wzr, [x8, #4]
add x8, x8, w0, sxtw #2
ldr w0, [x8, #64]
ret
.Lfunc_end0:
.size main, .Lfunc_end0-main
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2018 Sep 20
3
Comparing Clang and GCC: only clang stores updated value in each iteration.
...eader=BB0_1 Depth=1
ahi %r0, 1
strl %r0, a
.LBB0_3: # %do.cond
# in Loop: Header=BB0_1 Depth=1
cijlh %r0, 0, .LBB0_1
# %bb.4: # %do.end
br %r14
.Lfunc_end0:
.size b, .Lfunc_end0-b
# -- End function
.type a, at object # @a
.data
.globl a
.p2align 2
a:
.long 1 # 0x1
.size a, 4
gcc -O3 -march=z13:...
2019 Jun 30
6
[hexagon][PowerPC] code regression (sub-optimal code) on LLVM 9 when generating hardware loops, and the "llvm.uadd" intrinsic.
...g: [A,0x40'A',A,0x5a'A',0x00,0x41,0x02,0xf5,0x02,0xf2,0x00,0x78]
// fixup A - offset: 0, value: memmove, kind: fixup_Hexagon_B22_PCREL
{
r31:30 = dealloc_return(r30):raw
} // encoding: [0x1e,0xc0,0x1e,0x96]
.Lfunc_end0:
.size hexagon2, .Lfunc_end0-hexagon2
// -- End function
This is the assembly code generated by LLVM 7.0 :
.text
.file "main.c"
.globl hexagon2 // -- Begin function hexagon2
.p2align 2
.type hexagon2, at function
hexagon2:...
2020 Jun 12
2
Issue with __attribute__((constructor)) and -Os -fno-common
...gnueabihf -Os -S ctor.c \
>> -o /dev/stdout | grep init_fn
>> .p2align 2 @ -- Begin function init_fn
>> .type init_fn,%function
>> .code 32 @ @init_fn
>> init_fn:
>> .size init_fn, .Lfunc_end0-init_fn
>> .long init_fn(target1)
>> .addrsig_sym init_fn
>> $ clang --target=arm-linux-gnueabihf -fno-common -S ctor.c \
>> -o /dev/stdout | grep init_fn
>> .p2align 2 @ -- Begin function init_fn
>> .type...
2016 Jun 29
2
avx512 JIT backend generates wrong code on <4 x float>
...xmm1, %xmm1
vfmadd213ss %xmm4, %xmm0, %xmm2
vfmsub213ss %xmm1, %xmm0, %xmm3
vmovaps %xmm2, -16(%rsi)
vmovaps %xmm3, (%rsi)
addq $1, %rax
addq $32, %rsi
addq $32, %rdi
addq $32, %rdx
cmpq %rcx, %rax
jl .LBB0_1
retq
.Lfunc_end0:
.size adjmul, .Lfunc_end0-adjmul
.cfi_endproc
.section ".note.GNU-stack","", at progbits
end assembly!
The instructions 'vfmadd213ss' are 'Fused Multiply-Add of Scalar
Single-Precision Floating-Point'. Those should be SIMD vector
inst...
2016 Jun 29
0
avx512 JIT backend generates wrong code on <4 x float>
...; vfmsub213ss %xmm1, %xmm0, %xmm3
> vmovaps %xmm2, -16(%rsi)
> vmovaps %xmm3, (%rsi)
> addq $1, %rax
> addq $32, %rsi
> addq $32, %rdi
> addq $32, %rdx
> cmpq %rcx, %rax
> jl .LBB0_1
> retq
> .Lfunc_end0:
> .size adjmul, .Lfunc_end0-adjmul
> .cfi_endproc
>
>
> .section ".note.GNU-stack","", at progbits
>
> end assembly!
>
>
> The instructions 'vfmadd213ss' are 'Fused Multiply-Add of Scalar
> Single-Precision...
2017 Dec 19
4
A code layout related side-effect introduced by rL318299
...op: Header=BB0_1 Depth=1
movq (%rdi), %rcx
movq %rcx, (%rsi)
movq 8(%rdi), %rcx
movq %rcx, (%rsi)
addq $6, %rdi
addq $6, %rsi
cmpq %rdx, %rsi
jb .LBB0_1
# BB#3: # %return
movq %rdx, %rax
popq %rcx
retq
.LBB0_4: # %while.end
callq _Z1fv
.Lfunc_end0:
.size _Z1gPcS_S_, .Lfunc_end0-_Z1gPcS_S_
.cfi_endproc
call _Z1fv is unreachable. Suppose loop LBB0_1 has few iterations, a.s will
contain mostly fall through branches.
-------------------------- b.s generated from b.ll
----------------------------
~/workarea/llvm-r318298/dbuild/bin/opt -loop-rot...
2016 Jun 30
1
avx512 JIT backend generates wrong code on <4 x float>
...; vmovaps %xmm2, -16(%rsi)
>> vmovaps %xmm3, (%rsi)
>> addq $1, %rax
>> addq $32, %rsi
>> addq $32, %rdi
>> addq $32, %rdx
>> cmpq %rcx, %rax
>> jl .LBB0_1
>> retq
>> .Lfunc_end0:
>> .size adjmul, .Lfunc_end0-adjmul
>> .cfi_endproc
>>
>>
>> .section ".note.GNU-stack","", at progbits
>>
>> end assembly!
>>
>>
>> The instructions 'vfmadd213ss' are 'Fused Multipl...
2017 Dec 19
2
A code layout related side-effect introduced by rL318299
...gt;> addq $6, %rdi
>> addq $6, %rsi
>> cmpq %rdx, %rsi
>> jb .LBB0_1
>> # BB#3: # %return
>> movq %rdx, %rax
>> popq %rcx
>> retq
>> .LBB0_4: # %while.end
>> callq _Z1fv
>> .Lfunc_end0:
>> .size _Z1gPcS_S_, .Lfunc_end0-_Z1gPcS_S_
>> .cfi_endproc
>>
>> call _Z1fv is unreachable. Suppose loop LBB0_1 has few iterations, a.s
>> will contain mostly fall through branches.
>>
>> -------------------------- b.s generated from b.ll
>> -------...
2016 Jun 23
2
AVX512 instruction generated when JIT compiling for an avx2 architecture
...mm2
vmovd %esi, %xmm3
vpbroadcastd %xmm3, %xmm3
vmovdqa32 %xmm0, -48(%rdx)
vmovdqa32 %xmm1, -32(%rdx)
vmovdqa32 %xmm2, -16(%rdx)
vmovdqa32 %xmm3, (%rdx)
addq $1, %rax
addq $64, %rdx
cmpq %rcx, %rax
jl .LBB0_1
retq
.Lfunc_end0:
.size main, .Lfunc_end0-main
.cfi_endproc
.section ".note.GNU-stack","", at progbits
end assembly!
I am not sure what instruction is the offending one, but the 'vmovdqa32'
looks avx512.
I wasn't able to reproduce this with 'opt' -...
2019 Jul 01
0
[hexagon][PowerPC] code regression (sub-optimal code) on LLVM 9 when generating hardware loops, and the "llvm.uadd" intrinsic.
...// fixup A - offset: 0, value: memmove, kind: fixup_Hexagon_B22_PCREL
{
r31:30 = dealloc_return(r30):raw
} // encoding: [0x1e,0xc0,0x1e,0x96]
.Lfunc_end0:
.size hexagon2, .Lfunc_end0-hexagon2
// -- End function
This is the assembly code generated by LLVM 7.0 :
.text
.file "main.c"...
2017 Aug 21
3
DragonEgg for GCC v8.x and LLVM v6.x is just able to work
..._cfa_offset 16
.Ltmp1:
.cfi_offset %rbp, -16
movq %rsp, %rbp
.Ltmp2:
.cfi_def_cfa_register %rbp
movl $.L.cst, %edi
movl $.L.cst.1, %esi
movl $4, %edx
movl $__func__.2210, %ecx
xorl %eax, %eax
callq printf
popq %rbp
retq
.Lfunc_end0:
.size foo, .Lfunc_end0-foo
.cfi_endproc
.globl main
.p2align 4, 0x90
.type main, at function
main: # @main
.cfi_startproc
# BB#0: # %entry
pushq %rbp
.Ltmp3:
.cfi_def_cfa_offse...
2016 Jun 23
2
AVX512 instruction generated when JIT compiling for an avx2 architecture
...dqa32 %xmm0, -48(%rdx)
> vmovdqa32 %xmm1, -32(%rdx)
> vmovdqa32 %xmm2, -16(%rdx)
> vmovdqa32 %xmm3, (%rdx)
> addq $1, %rax
> addq $64, %rdx
> cmpq %rcx, %rax
> jl .LBB0_1
> retq
> .Lfunc_end0:
> .size main, .Lfunc_end0-main
> .cfi_endproc
>
>
> .section ".note.GNU-stack","", at progbits
>
> end assembly!
>
> I am not sure what instruction is the offending one, but the
> 'vmovdqa32' looks...
2019 Jul 31
0
Stackmap offset computation on AArch64
...8-byte Folded Spill
>>> .cfi_def_cfa_offset 16
>>> .cfi_offset w30, -16
>>> str x0, [sp, #8]
>>> bl return_i1
>>> .Ltmp0:
>>> ldr x0, [sp, #8]
>>> ldr x30, [sp], #16 // 8-byte Folded Reload
>>> ret
>>> .Lfunc_end0:
>>> .size test, .Lfunc_end0-test
>>> .cfi_endproc
>>>
>>> The generated stackmap indicates that %ptr is located at offset -8 from the stack pointer, instead of the expected 8. After trying a few other configurations it happens that the offsets are computed re...
2018 Sep 11
3
OpenJDK8 failed to work after compiled by LLVM 8 for X86
Hi Dimitry,
Thanks for your kind response!
Thanks for the commit message of Jung's patch, I found that the bug had
been fixed in OpenJDK 12 by Zhengyu
https://bugs.openjdk.java.net/browse/JDK-8205965 But only backported to
11. So Jung could backport it for OpenJDK 8, thanks a lot!
But I argue that the root cause might be in the compiler side, why
clang-3.9.1, gcc-6.4.1 couldn't
2020 Jul 15
2
[MTE] Tagging Globals
...// %entry*
>
> * adrp x8, global_array*
>
> * add x8, x8, :lo12:global_array*
>
> * str wzr, [x8, #4]*
>
> * add x8, x8, w0, sxtw #2*
>
> * ldr w0, [x8, #64]*
>
> * ret*
>
> *.Lfunc_end0:*
>
> * .size main, .Lfunc_end0-main*
>
>
>
> _______________________________________________
> LLVM Developers mailing list
> llvm-dev at lists.llvm.org
> https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-dev
>
>
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