Displaying 20 results from an estimated 232 matches for "lerning".
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2007 Mar 02
0
R: ARIMA forecasting
Dear all,
I just have a short question regarding the forecasting of ARIMA models with
external regressors.
I tried to program a ARX(1) model
arx.mod <- arima(reihe.lern, order = c(1, 0, 0), seasonal =
list(order = c(0, 0, 0), period = 52), xreg = lern.design, include.mean =
TRUE)
for which I need to estimate the next (105th) value. Xreg=lern.design is -
at this time - 104 rows long. I
2020 Mar 13
3
Why MachineBasicBlcok doesn't have transferPredecessors() ?
for example
I want to insert a new machine bb “before” a specific machine bb.
or split a mbb and keep the later one as the original one.
(to keep the label/Blackadder's correct
t)
(or keep other property of mbb)
so I need to transfer the original mbb's predecessor to the new mbb.
Nicolai Hähnle <nhaehnle at gmail.com> 於 2020年3月13日 週五 23:57 寫道:
> On Fri, Mar 13, 2020 at
2020 Aug 04
2
Discourse category for the AMDGPU target
On Mon, Aug 3, 2020 at 7:00 PM David Blaikie <dblaikie at gmail.com> wrote:
> I don't have much personal interest here - but my understanding was
> that there was/is a fair bit of pushback to fragmenting the
> communications channels to discord before there's a more general
> buy-in to switch over across the project? (perhaps I'm misremembering
> the previous
2020 Feb 05
2
Eliminate some two entry PHI nodes - SimplifyCFG
Conditional on the target supporting cmov? Though that's probably not
optimal.
On Wed, Feb 5, 2020, 7:47 AM Nicolai Hähnle <nhaehnle at gmail.com> wrote:
> Hi Ryan,
>
> On Mon, Feb 3, 2020 at 7:08 PM Ryan Taylor via llvm-dev
> <llvm-dev at lists.llvm.org> wrote:
> > SimplifyCFG FoldTwoEntryPhiNode looks to simplify all 2 entry phi nodes
> in a block, if it
2018 Aug 22
2
Condition code in DAGCombiner::visitFADDForFMACombine?
On 22.08.2018 17:52, Ryan Taylor wrote:
> This is probably going to effect on other backends and break llvm-lit
> for them?
Very likely, yes. Can you take a look at how big the fallout is? This
might give us a hint about what other frontends might expect, and who
needs to be involved in the discussion (if one is needed).
Cheers,
Nicolai
>
> On Wed, Aug 22, 2018 at 11:41 AM
2018 Aug 22
4
Condition code in DAGCombiner::visitFADDForFMACombine?
On 22.08.2018 13:29, Ryan Taylor wrote:
> The example starts as SPIR-V with the NoContraction decoration flag on
> the fmul.
>
> I think what you are saying seems valid in that if the user had put the
> flag on the fadd instead of the fmul it would not contract and so in
> this example the user needs to put the NoContraction on the fadd though
> I'm not sure
2019 Jun 06
3
[RFC] Expressing preserved-relations between passes from different modules (was: Re: Linker issue)
Any comments at all on this? Chandler perhaps?
I've since dug a bit further, and it seems like the template-based
solution wouldn't work anyway because DLL loading on Windows can't do
the required commoning. So the general approach taken in
https://reviews.llvm.org/D62802 seems to be the only technically
viable path forward, though it would still be good to get an outside
look at the
2006 Feb 13
2
How can I put the error messages generated by the validation routines into it''s own side frame and how can a click on a error message take me right to the error?
Hello,
I''m a newbie, coming from Visual FoxPro - a database centric and object
orientated scripting language with a rich set of graphical user
interface controlls. Lerning ruby on rails means for me to lern html as
well. But now to my
problem:
The validation errors are listed at the top of the page without any
order. Depending on the size of the form and the numbers of errors
listed the data entry fields containing the corresponding invalid data
eventually are o...
2020 Jul 27
2
Discourse category for the AMDGPU target
Hi all,
We’ve been having discussions over the last few weeks with
stakeholders both inside and outside of AMD about where we could best
have a dedicated and open discussion space for topics around the
AMDGPU target. The conclusion was that we’d like to try the use of a
category in the LLVM Discourse group, which is mostly used for MLIR
discussion so far.
I have started a Discourse topic with
2018 Aug 22
2
Condition code in DAGCombiner::visitFADDForFMACombine?
On 21.08.2018 16:08, Ryan Taylor via llvm-dev wrote:
> So I have a test case where:
>
> %20 = fmul nnan arcp float %15, %19
> %21 = fadd reassoc nnan arcp contract float %20, -1.000000e+00
>
> is being contracted in DAG to fmad. Is this correct since the fmul has
> no reassoc or contract fast math flag?
By having the reassoc and contract flags on fadd, the frontend is
2020 Aug 09
2
_mm_lfence in both pathes of an if/else are hoisted by SimplfyCFG potentially breaking use as a speculation barrier
Hi Craig,
The review for the similar GPU problem is now up here:
https://reviews.llvm.org/D85603 (+ some other patches on the
Phabricator stack).
>From a pragmatic perspective, the constraints added to program
transforms there are sufficient for what you need. You'd produce IR
such as:
%token = call token @llvm.experimental.convergence.anchor()
br i1 %c, label %then, label %else
2020 Aug 14
3
cmpxchg on floats
We've relaxed `atomicrmw xchg` to support floating point types but not
cmpxchg -- the cmpxchg comparison behavior is not a floating point
comparison, so that would be potentially misleading. I'd say adding
the assertion is a good idea.
Cheers,
Nicolai
On Thu, Aug 13, 2020 at 10:59 PM Chris Lattner via llvm-dev
<llvm-dev at lists.llvm.org> wrote:
>
> Does the code generator
2020 Aug 04
2
TableGen trace facility
Are all the records collected as they are parsed, with template parameter substitution and lets, and *then*, after all records are collected, a "pass" is made to calculate the inter-field expressions?
Once I understand this, I will add a section to the new guide to explain it. I presume it is the case that this behavior should be publicized.
It also appears to be the case that a record
2020 Feb 16
2
MLIR for clang
Hi Prashanth,
On Sun, Feb 16, 2020 at 10:22 AM Prashanth N R via llvm-dev
<llvm-dev at lists.llvm.org> wrote:
>> Starting from May-June, we at "Compiler Tree" would start porting clang compiler to use MLIR as middle end target. If someone has already started a similar effort we would love to collaborate with them. If someone would like to work with us, we are ready to
2018 Aug 23
2
Condition code in DAGCombiner::visitFADDForFMACombine?
Nicolai,
Can you do without the use of -fp-contract=fast (Options.AllowFPOpFusion == FPOpFusion::Fast ) and without Unsafe?
As I SPIR-V’s usage of NoContraction flies in the face of both.
If so, you should be able to get what you want, as then you are down to just IR flags. You will need a model to generate the correct behavior though in your SPIR-V implementation wrt IR flag emissions.
2020 Aug 04
3
TableGen trace facility
Yes, I understand the problem. To be more useful, TableGen would have to carry the traces along with the classes and records and (re)display the values while the substitutions are being made.
I'm writing a new Programmer's Guide for TableGen and have been digging into the parse-time versus substitution-time issue. I haven't found a document that makes it clear. Can you give a quick
2018 Mar 14
0
TableGen: spring cleaning, new features for "functional programming"
Hi Nicolai,
if you're open to it, I'd like suggest another smallish cleanup in
libTablegen, namely doing something about the layering. Basicly what bit me
a few times is that there is a `Main.cpp` file. This particular file adds
CLI options such as -o, -d, -I. So if you build some out-of-tree tool and
happen to link against `all` components because you're lazy, there is a
high
2018 Feb 19
4
TableGen: spring cleaning, new features for "functional programming"
Hi all,
While working on some features for the AMDGPU backend -- specifically,
explicit address components for image intrinsics, which involves
generating both
(a) a lot of intrinsics with different but somewhat regular parameter
types, and
(b) the patterns to select instructions for those intrinsics
-- I got fed up with a lot of the TableGen bugs and limitations and set
out to fix things.
2005 Nov 21
1
How to add the footer to multipart emails
I recently lerned that Mailman adds its footer to MIME multipart
messages by putting the original message in the first part of a new
multipart/mixed entity and the footer in the second part, with
Content-Disposition: inline. It works well in Thunderbird at least, i.e.
the footer is visible; the glitch is that the footer shows up as an
attachment as well, as does my PGP/MIME signature.
Would this
2020 Mar 13
2
Why MachineBasicBlcok doesn't have transferPredecessors() ?
Hi
I want to ask a question.
(Maybe it is a trivial question.)
I found that there is transferSuccessors() in MachineBasicBlcok
So that when manipulating MachineBasicBlock,
we can use transferSuccessors to update the CFG easily.
Why there is not transferPredecessors in MachineBasicBlcok ?
Thank you
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