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...ces. It may be the case that your VLA support isn't providing enough stack. You may want to try using the pseudostack mode which will instead put that memory on the heap and give you better control over making sure you have enough available. On Tue, Jun 4, 2024 at 10:28?AM Leonid Shigris <LeonidS at riscogroup.com> wrote: > > Hi Timothy, > > Because I don't see any memory overflow, remains only any memory corruption and for sure it happens inside the library. > > Has anyone managed to run this library on embedded systems such as STM32, NXP IMXRT1060? By using opus_d...

Hi, I believe the following patch in the GIT - 2.6.17-rc5 is not correct: http://www.kernel.org/git/?p=linux/kernel/git/torvalds/linux-2.6.git;a=commitdiff;h=75616cf9854b83eb83a968b1338ae0ee11c9673c It is the second of the two patches contributed by Leonid Ananiev. This one incorrectly adds the super block unlocking in the error path, though. As we can see in the function ext3_group_add() the

...see any memory overflow, remains only any memory corruption and for sure it happens inside the library. Has anyone managed to run this library on embedded systems such as STM32, NXP IMXRT1060? By using opus_demo code (decoding part)? Pls advise, Kind Regards, Leonid Shigris RT Engineer Email: LeonidS at riscogroup.com -----Original Message----- From: opus <opus-bounces at xiph.org> On Behalf Of Timothy B. Terriberry Sent: Tuesday, 4 June 2024 13:17 To: opus at xiph.org Subject: Re: [opus] opus library issues [You don't often get email from tterribe at xiph.org. Learn why this is im...

Is it possible to disable the unbond resolver in the asterisk configuration? Or, it is necessary just to disable the module? Best regards, Leonid Fainshtein On Thu, Aug 27, 2020 at 3:29 PM Joshua C. Colp <jcolp at sangoma.com> wrote: > On Thu, Aug 27, 2020 at 9:24 AM Leonid Fainshtein < > leonid.fainshtein at xorcom.com> wrote: > >> I deleted the

...ibrary opus and successfully compiled (at least didn?t receive compile warning or errors). What a right way to take opus file and decode to wav file? I see, there a few examples, but I don?t know what example will be suitable for me? Pls advise, Kind Regards, Leonid Shigris RT Engineer Email: LeonidS at riscogroup.com<mailto:LeonidS at riscogroup.com> -------------- next part -------------- An HTML attachment was scrubbed... URL: <http://lists.xiph.org/pipermail/opus/attachments/20240526/f980017a/attachment.htm>

On Thu, Jan 14, 2016 at 12:04:45PM +0000, Will Deacon wrote: > On Wed, Jan 13, 2016 at 12:58:22PM -0800, Leonid Yegoshin wrote: > > On 01/13/2016 12:48 PM, Peter Zijlstra wrote: > > >On Wed, Jan 13, 2016 at 11:02:35AM -0800, Leonid Yegoshin wrote: > > > > > >>I ask HW team about it but I have a question - has it any relationship with > >

On Thu, Jan 14, 2016 at 12:04:45PM +0000, Will Deacon wrote: > On Wed, Jan 13, 2016 at 12:58:22PM -0800, Leonid Yegoshin wrote: > > On 01/13/2016 12:48 PM, Peter Zijlstra wrote: > > >On Wed, Jan 13, 2016 at 11:02:35AM -0800, Leonid Yegoshin wrote: > > > > > >>I ask HW team about it but I have a question - has it any relationship with > >

I deleted the res_resolver_unbound.so module, and now it works as expected. So, the problem is related to the 'unbound' resolver? FYI: I'm using Asterisk 16.2 installed from Debian 10 repository. Best regards, Leonid Fainshtein On Thu, Aug 27, 2020 at 3:01 PM Joshua C. Colp <jcolp at sangoma.com> wrote: > On Thu, Aug 27, 2020 at 8:58 AM Leonid Fainshtein < >

On 01/13/2016 12:48 PM, Peter Zijlstra wrote: > On Wed, Jan 13, 2016 at 11:02:35AM -0800, Leonid Yegoshin wrote: > >> I ask HW team about it but I have a question - has it any relationship with >> replacing MIPS SYNC with lightweight SYNCs (SYNC_WMB etc)? > Of course. If you cannot explain the semantics of the primitives you > introduce, how can we judge the patch. >

On 01/13/2016 12:48 PM, Peter Zijlstra wrote: > On Wed, Jan 13, 2016 at 11:02:35AM -0800, Leonid Yegoshin wrote: > >> I ask HW team about it but I have a question - has it any relationship with >> replacing MIPS SYNC with lightweight SYNCs (SYNC_WMB etc)? > Of course. If you cannot explain the semantics of the primitives you > introduce, how can we judge the patch. >

On 01/10/2016 06:18 AM, Michael S. Tsirkin wrote: > On mips dma_rmb, dma_wmb, smp_store_mb, read_barrier_depends, > smp_read_barrier_depends, smp_store_release and smp_load_acquire match > the asm-generic variants exactly. Drop the local definitions and pull in > asm-generic/barrier.h instead. > This statement doesn't fit MIPS barriers variations. Moreover, there is a reason

On 01/10/2016 06:18 AM, Michael S. Tsirkin wrote: > On mips dma_rmb, dma_wmb, smp_store_mb, read_barrier_depends, > smp_read_barrier_depends, smp_store_release and smp_load_acquire match > the asm-generic variants exactly. Drop the local definitions and pull in > asm-generic/barrier.h instead. > This statement doesn't fit MIPS barriers variations. Moreover, there is a reason

On 01/13/2016 02:45 AM, Will Deacon wrote: > On Tue, Jan 12, 2016 at 12:45:14PM -0800, Leonid Yegoshin wrote: >> > I don't think the address dependency is enough on its own. By that > reasoning, the following variant (WRC+addr+addr) would work too: > > > P0: > Wx = 1 > > P1: > Rx == 1 > <address dep> > Wy = 1 > > P2: > Ry == 1 >

On 01/13/2016 02:45 AM, Will Deacon wrote: > On Tue, Jan 12, 2016 at 12:45:14PM -0800, Leonid Yegoshin wrote: >> > I don't think the address dependency is enough on its own. By that > reasoning, the following variant (WRC+addr+addr) would work too: > > > P0: > Wx = 1 > > P1: > Rx == 1 > <address dep> > Wy = 1 > > P2: > Ry == 1 >

On Thu, Jan 14, 2016 at 12:46:43PM -0800, Leonid Yegoshin wrote: > On 01/14/2016 12:15 PM, Peter Zijlstra wrote: > >On Thu, Jan 14, 2016 at 11:42:02AM -0800, Leonid Yegoshin wrote: > >>An the only point - please use an appropriate SYNC_* barriers instead of > >>heavy bold hammer. That stuff was design explicitly to support the > >>requirements of

On Thu, Jan 14, 2016 at 12:46:43PM -0800, Leonid Yegoshin wrote: > On 01/14/2016 12:15 PM, Peter Zijlstra wrote: > >On Thu, Jan 14, 2016 at 11:42:02AM -0800, Leonid Yegoshin wrote: > >>An the only point - please use an appropriate SYNC_* barriers instead of > >>heavy bold hammer. That stuff was design explicitly to support the > >>requirements of

On 01/14/2016 04:47 PM, Paul E. McKenney wrote: > On Thu, Jan 14, 2016 at 03:33:40PM -0800, Leonid Yegoshin wrote: >> Don't be fooled here by words "ordered" and "completed" - it is HW >> design items and actually written poorly. >> Just assume that SYNC_MB is absolutely the same as SYNC for any CPU >> and coherent device (besides performance).

On 01/14/2016 04:47 PM, Paul E. McKenney wrote: > On Thu, Jan 14, 2016 at 03:33:40PM -0800, Leonid Yegoshin wrote: >> Don't be fooled here by words "ordered" and "completed" - it is HW >> design items and actually written poorly. >> Just assume that SYNC_MB is absolutely the same as SYNC for any CPU >> and coherent device (besides performance).

Paul, On Thu, Jan 14, 2016 at 02:20:46PM -0800, Paul E. McKenney wrote: > On Thu, Jan 14, 2016 at 01:24:34PM -0800, Leonid Yegoshin wrote: > > It is not so simple, I mean "local ordering for address and data > > dependencies". Local ordering is NOT enough. It happens that current > > MIPS R6 doesn't require in your example smp_read_barrier_depends() > >

Paul, On Thu, Jan 14, 2016 at 02:20:46PM -0800, Paul E. McKenney wrote: > On Thu, Jan 14, 2016 at 01:24:34PM -0800, Leonid Yegoshin wrote: > > It is not so simple, I mean "local ordering for address and data > > dependencies". Local ordering is NOT enough. It happens that current > > MIPS R6 doesn't require in your example smp_read_barrier_depends() > >