search for: ldwi

...6:1 But after it, one has 1 more node than the other compiler 1 ===== Instruction selection ends: Selected selection DAG: %bb.0 '_Z9test_mathv:' SelectionDAG has 8 nodes: t0: ch = EntryToken t1: i32 = add TargetFrameIndex:i32<0>, TargetConstant:i32<0> t4: i32,ch = LDWI<Mem:(dereferenceable load 4 from %ir.a)> t1, t0 t6: ch,glue = CopyToReg t0, Register:i32 $r4, t4 t7: ch = JLR Register:i32 $r4, t6, t6:1 compiler 2 ===== Instruction selection ends: Selected selection DAG: BB#0 '_Z9test_mathv:' SelectionDAG has 7 nodes: t0: ch = EntryToken...

...>; But then I end up having the following bug: Code %0 = zext i8 %data to i32 %1 = zext i16 %crc to i32 %2 = xor i32 %1, %0 %3 = and i32 %2, 1 %4 = icmp eq i32 %3, 0 which compares the lowest bits of the 2 variables ends up being compiled as %reg16384<def> = LDWi <fi#-2>, 0; mem:LD4[FixedStack-2] I32Regs:%reg16384 %reg16385<def> = LDWi <fi#-1>, 0; mem:LD4[FixedStack-1] I32Regs:%reg16385 %reg16386<def> = COPY %reg16384; I32Regs:%reg16386,16384 %reg16390<def> = NErrb %reg16384, %reg16385; I1Regs:%reg16390...

...gt; %0 = zext i8 %data to i32 > %1 = zext i16 %crc to i32 > %2 = xor i32 %1, %0 > %3 = and i32 %2, 1 > %4 = icmp eq i32 %3, 0 > > > which compares the lowest bits of the 2 variables > > > ends up being compiled as > > > %reg16384<def> = LDWi <fi#-2>, 0; mem:LD4[FixedStack-2] I32Regs:%reg16384 > %reg16385<def> = LDWi <fi#-1>, 0; mem:LD4[FixedStack-1] I32Regs:%reg16385 > %reg16386<def> = COPY %reg16384; I32Regs:%reg16386,16384 > %reg16390<def> = NErrb %reg16384, %reg16385; I1Reg...

...%1, %0 >>>>> %3 = and i32 %2, 1 >>>>> %4 = icmp eq i32 %3, 0 >>>>> >>>>> which compares the lowest bits of the 2 variables >>>>> ends up being compiled as >>>>> >>>>> %reg16384<def> = LDWi <fi#-2>, 0; mem:LD4[FixedStack-2] I32Regs:%reg16384 >>>>> %reg16385<def> = LDWi <fi#-1>, 0; mem:LD4[FixedStack-1] I32Regs:%reg16385 >>>>> %reg16386<def> = COPY %reg16384; I32Regs:%reg16386,16384 >>>>> %reg16390<def>...

...%1, %0 >>>>> %3 = and i32 %2, 1 >>>>> %4 = icmp eq i32 %3, 0 >>>>> >>>>> which compares the lowest bits of the 2 variables >>>>> ends up being compiled as >>>>> >>>>> %reg16384<def> = LDWi <fi#-2>, 0; mem:LD4[FixedStack-2] I32Regs:%reg16384 >>>>> %reg16385<def> = LDWi <fi#-1>, 0; mem:LD4[FixedStack-1] I32Regs:%reg16385 >>>>> %reg16386<def> = COPY %reg16384; I32Regs:%reg16386,16384 >>>>> %reg16390<d...

...= zext i8 %data to i32 >> %1 = zext i16 %crc to i32 >> %2 = xor i32 %1, %0 >> %3 = and i32 %2, 1 >> %4 = icmp eq i32 %3, 0 >> >> which compares the lowest bits of the 2 variables >> ends up being compiled as >> >> %reg16384<def> = LDWi <fi#-2>, 0; mem:LD4[FixedStack-2] I32Regs:%reg16384 >> %reg16385<def> = LDWi <fi#-1>, 0; mem:LD4[FixedStack-1] I32Regs:%reg16385 >> %reg16386<def> = COPY %reg16384; I32Regs:%reg16386,16384 >> %reg16390<def> = NErrb %reg16384, %reg163...

...t; %1 = zext i16 %crc to i32 >>> %2 = xor i32 %1, %0 >>> %3 = and i32 %2, 1 >>> %4 = icmp eq i32 %3, 0 >>> >>> which compares the lowest bits of the 2 variables >>> ends up being compiled as >>> >>> %reg16384<def> = LDWi <fi#-2>, 0; mem:LD4[FixedStack-2] I32Regs:%reg16384 >>> %reg16385<def> = LDWi <fi#-1>, 0; mem:LD4[FixedStack-1] I32Regs:%reg16385 >>> %reg16386<def> = COPY %reg16384; I32Regs:%reg16386,16384 >>> %reg16390<def> = NErrb %reg16...

...>>> %2 = xor i32 %1, %0 >>>> %3 = and i32 %2, 1 >>>> %4 = icmp eq i32 %3, 0 >>>> >>>> which compares the lowest bits of the 2 variables >>>> ends up being compiled as >>>> >>>> %reg16384<def> = LDWi <fi#-2>, 0; mem:LD4[FixedStack-2] I32Regs:%reg16384 >>>> %reg16385<def> = LDWi <fi#-1>, 0; mem:LD4[FixedStack-1] I32Regs:%reg16385 >>>> %reg16386<def> = COPY %reg16384; I32Regs:%reg16386,16384 >>>> %reg16390<def> = NEr...

...t; %3 = and i32 %2, 1 >>>>>> %4 = icmp eq i32 %3, 0 >>>>>> >>>>>> which compares the lowest bits of the 2 variables >>>>>> ends up being compiled as >>>>>> >>>>>> %reg16384<def> = LDWi <fi#-2>, 0; mem:LD4[FixedStack-2] I32Regs:%reg16384 >>>>>> %reg16385<def> = LDWi <fi#-1>, 0; mem:LD4[FixedStack-1] I32Regs:%reg16385 >>>>>> %reg16386<def> = COPY %reg16384; I32Regs:%reg16386,16384 >>>>>> %reg1...

...a code to fold a stack address calculation into the load operation that accesses the variable. > Where in the code should I look into? It could be implemented in a couple of places. Most likely is that XYZInstrInfo.td (or some related TableGen file) defines a ComplexPattern that is used by the LDWI instruction definition. That ComplexPattern tells pattern matching to call a specific function in XYZISelDAGToDAG.cpp when deciding what to use for the LDWI operands. That C++ function is probably what looks for an FrameIndex node and has been taught that it can be folded into the load. If you jus...