search for: ldrt

...that an instruction such as LDR.W r0, [pc, #1] (positive immediate) will decode into t2LDRi12, whereas the same literal load with a negative immediate will randomly either fail to decode (test with 0x5f 0xf8 0x01 0x20 which should bd LDR.W r2, [pc, #-1]), or decode to some predictable version of t2LDRT, t2LDRi8, etc... based on certain bits in the immediate matching the ones set in the corresponding instruction. The 'U' bit of t2LDRpci is additionally set as "?" which seems to always end up being 0 as there is no encoder method to deal with it, so it will happily output a ne...