search for: ldrsb

Hi, I have a question about the definitions of t2LDRSB and t2LDRSB_PRE in ARMInstrThumb2.td : I was aware that the definitions of target RegisterClass (outs) are different in t2LDRSB and t2LDRSB_PRE. While t2LDRSB uses rGPR, t2LDRSB_PRE uses GPR. I wonder if lr and pc are already prevented from being allocated in pre-indexing case, because of some...

Hi Junbum, > I was aware that the definitions of target RegisterClass (outs) are different in t2LDRSB and t2LDRSB_PRE. While t2LDRSB uses rGPR, t2LDRSB_PRE uses GPR. I wonder if lr and pc are already prevented from being allocated in pre-indexing case, because of some register hint that is being enforced? They're not allocated during CodeGen because of the Reserved.set(…) calls in ARMBaseRe...

....td file and freezing lr and pc during register allocation in writeback version? Thanks, Junbum On May 23, 2013, at 11:51 AM, Tim Northover <tnorthover at apple.com> wrote: > Hi Junbum, > >> I was aware that the definitions of target RegisterClass (outs) are different in t2LDRSB and t2LDRSB_PRE. While t2LDRSB uses rGPR, t2LDRSB_PRE uses GPR. I wonder if lr and pc are already prevented from being allocated in pre-indexing case, because of some register hint that is being enforced? > > They're not allocated during CodeGen because of the Reserved.set(…) calls in...

Hi all, Consider this ARM assembly code of a C function: 00008124 <foo>: 8124: push {r4, r6, r7, lr} 8126: add r7, sp, #8 8128: mov r4, r0 812a: ldrsb.w r0, [r2] 812e: cmp r0, #1 8130: itt lt 8132: movlt r0, #85 ; 0x55 8134: poplt {r4, r6, r7, pc} // a function return 8136: ldrb.w ip, [r1, #3] 813a:...

...; > Hi all, > > Consider this ARM assembly code of a C function: > > 00008124 <foo>: > 8124: push {r4, r6, r7, lr} > 8126: add r7, sp, #8 > 8128: mov r4, r0 > 812a: ldrsb.w r0, [r2] > 812e: cmp r0, #1 > 8130: itt lt > 8132: movlt r0, #85 ; 0x55 > 8134: poplt {r4, r6, r7, pc} // a function return > > 8136: ldrb.w ip,...

...ilto:sontuan.vu119 at gmail.com>> wrote: Hi all, Consider this ARM assembly code of a C function: 00008124 <foo>: 8124: push {r4, r6, r7, lr} 8126: add r7, sp, #8 8128: mov r4, r0 812a: ldrsb.w r0, [r2] 812e: cmp r0, #1 8130: itt lt 8132: movlt r0, #85 ; 0x55 8134: poplt {r4, r6, r7, pc} // a function return 8136: ldrb.w ip, [r1, #3] 813a:...

...gt;> >> >> >> 00008124 <foo>: >> >> 8124: push {r4, r6, r7, lr} >> >> 8126: add r7, sp, #8 >> >> 8128: mov r4, r0 >> >> 812a: ldrsb.w r0, [r2] >> >> 812e: cmp r0, #1 >> >> 8130: itt lt >> >> 8132: movlt r0, #85 ; 0x55 >> >> 8134: poplt {r4, r6, r7, pc} // a >> funct...

...nsider this ARM assembly code of a C function: > > > > 00008124 <foo>: > > 8124: push {r4, r6, r7, lr} > > 8126: add r7, sp, #8 > > 8128: mov r4, r0 > > 812a: ldrsb.w r0, [r2] > > 812e: cmp r0, #1 > > 8130: itt lt > > 8132: movlt r0, #85 ; 0x55 > > 8134: poplt {r4, r6, r7, pc} // a > function return > > > > 8...

...his ARM assembly code of a C function: > > > > 00008124 <foo>: > > 8124: push {r4, r6, r7, lr} > > 8126: add r7, sp, #8 > > 8128: mov r4, r0 > > 812a: ldrsb.w r0, [r2] > > 812e: cmp r0, #1 > > 8130: itt lt > > 8132: movlt r0, #85 ; 0x55 > > 8134: poplt {r4, r6, r7, pc} // a function return > > > >...