search for: ldriuh_cdnnotpt

...How do we represent a _conditional_ assignment (def) in a bundle MI? More contents - currently we expose internal def/use/kill information to a bundle header - something like this: BUNDLE %PC<imp-def>, %R0<imp-def>, %P0<imp-use,kill>, %R16<imp-use> * %R0<def> = LDriuh_cdnNotPt %P0<kill,internal>, %R16, 0; * %P0<def> = CMPEQri %R16, 0; Here CMPEQri is a compare to a predicate register instruction, and LDriuh_cdnNotPt is a _conditional_ load, which might or might not Take place based on the outcome of the compare... As such R0 might or might not be define...

...l_ assignment (def) in a bundle MI? > > More contents - currently we expose internal def/use/kill information to a > bundle header - something like this: > > > BUNDLE %PC<imp-def>, %R0<imp-def>, %P0<imp-use,kill>, %R16<imp-use> > * %R0<def> = LDriuh_cdnNotPt %P0<kill,internal>, %R16, 0; > * %P0<def> = CMPEQri %R16, 0; > > Here CMPEQri is a compare to a predicate register instruction, and > LDriuh_cdnNotPt is a _conditional_ load, which might or might not > Take place based on the outcome of the compare... As such R0 might...

...s either the value of the instruction if it was conditionally executed or the value of the output register before the instruction. The Bundle would be: BUNDLE %PC<imp-def>, %R0<imp-def>, %P0<imp-use,kill>, %R16<imp-use>, %R0<imp-use,kill> * %R0<def> = LDriuh_cdnNotPt %P0<kill,internal>, %R16, 0, %R0<imp-use,kill> * %P0<def> = CMPEQri %R16, 0 The individual instruction would be: %R0<def> = LDriuh_cdnNotPt %P0<kill,internal>, %R16, 0, %R0<imp-use,...

...gt; > > > More contents - currently we expose internal def/use/kill > information > > to a bundle header - something like this: > > > > > > BUNDLE %PC<imp-def>, %R0<imp-def>, %P0<imp-use,kill>, %R16<imp-use> > > * %R0<def> = LDriuh_cdnNotPt %P0<kill,internal>, %R16, 0; > > * %P0<def> = CMPEQri %R16, 0; > > > > Here CMPEQri is a compare to a predicate register instruction, and > > LDriuh_cdnNotPt is a _conditional_ load, which might or might not > Take > > place based on the outcome of th...

Dave, Thank you for your interest. Please see my replies below. Sorry that my terminology is not as crisp as Andy's, but I think you can see what I mean. Sergei -- Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum. > -----Original Message----- > From: dag at cray.com [mailto:dag at cray.com] > Sent: Friday, May 11, 2012 12:14 PM > To: Sergei Larin > Cc:

...on if it was conditionally executed or the value of the > output register before the instruction. > > The Bundle would be: > > BUNDLE %PC<imp-def>, %R0<imp-def>, %P0<imp-use,kill>, %R16<imp-use>, > %R0<imp-use,kill> > * %R0<def> = LDriuh_cdnNotPt %P0<kill,internal>, %R16, 0, > %R0<imp-use,kill> > * %P0<def> = CMPEQri %R16, 0 > > The individual instruction would be: > > %R0<def> = LDriuh_cdnNotPt %P0<kill,internal>, %R16, 0, %R0<imp-use, >...

...More contents - currently we expose internal def/use/kill >> information >>> to a bundle header - something like this: >>> >>> >>> BUNDLE %PC<imp-def>, %R0<imp-def>, %P0<imp-use,kill>, %R16<imp-use> >>> * %R0<def> = LDriuh_cdnNotPt %P0<kill,internal>, %R16, 0; >>> * %P0<def> = CMPEQri %R16, 0; >>> >>> Here CMPEQri is a compare to a predicate register instruction, and >>> LDriuh_cdnNotPt is a _conditional_ load, which might or might not >> Take >>> place based on...

...exagon::POST_LDrih_cdnNotPt_V4: >> + >> + // Load unsigned halfword >> + case Hexagon::POST_LDriuh: >> + case Hexagon::POST_LDriuh_cPt: >> + case Hexagon::POST_LDriuh_cNotPt: >> + case Hexagon::POST_LDriuh_cdnPt_V4: >> + case Hexagon::POST_LDriuh_cdnNotPt_V4: >> + >> + // Load word >> + case Hexagon::POST_LDriw: >> + case Hexagon::POST_LDriw_cPt: >> + case Hexagon::POST_LDriw_cNotPt: >> + case Hexagon::POST_LDriw_cdnPt_V4: >> + case Hexagon::POST_LDriw_cdnNotPt_V4: >> + >> +...