Displaying 4 results from an estimated 4 matches for "ldreq".
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2017 Oct 09
4
{ARM} IfConversion does not detect BX instruction as a branch
Hi all,
I got a silly bug when compiling our project with the latest Clang.
Here's the outputted assembly:
> tst r3, #255
> strbeq r6, [r7]
> ldreq r6, [r4, r6, lsl #2]
> strne r6, [r7, #4]
> ldr r6, [r4, r6, lsl #2]
> bx r6
For the code to execute correctly, either the _ldr_ should be a _ldrne_
instruction or the _ldreq_ instruction should be removed. The error
seems to come from the IfConvertion MachinePass. Here's is what it l...
2007 Sep 24
0
[LLVMdev] RM Build
...h instruction: `ldr r0,.L25+12'
/tmp/ccYAgFFY.s:102: Error: no such instruction: `ldr r3,[r0,'
/tmp/ccYAgFFY.s:103: Error: expecting operand after ','; got nothing
/tmp/ccYAgFFY.s:104: Error: no such instruction: `ldr r3,.L25+16'
/tmp/ccYAgFFY.s:105: Error: no such instruction: `ldreq pc,[sp],'
/tmp/ccYAgFFY.s:106: Error: expecting operand after ','; got nothing
/tmp/ccYAgFFY.s:107: Error: no such instruction: `ldreq pc,[sp],'
/tmp/ccYAgFFY.s:108: Error: too many memory references for `mov'
/tmp/ccYAgFFY.s:109: Error: too many memory references for `mov'...
2017 Oct 11
2
{ARM} IfConversion does not detect BX instruction as a branch
...via llvm-dev <
llvm-dev at lists.llvm.org> wrote:
> On 10/9/2017 3:10 AM, Gaël Jobin via llvm-dev wrote:
>
> Hi all,
>
> I got a silly bug when compiling our project with the latest Clang. Here's
> the outputted assembly:
>
> tst r3, #255
> strbeq r6, [r7]
> ldreq r6, [r4, r6, lsl #2]
> strne r6, [r7, #4]
> ldr r6, [r4, r6, lsl #2]
> bx r6
>
> For the code to execute correctly, either the *ldr* should be a *ldrne*
> instruction or the *ldreq* instruction should be removed. The error seems
> to come from the IfConvertion MachinePass. Here...
2012 Feb 13
0
[PATCH 05/14] arm: implement exception and hypercall entries.
...5, c3, c0, 0
+
+ cpsid i
+
+ add r8, r8, #8
+ ldmia r8, {r13, r14}^
+ ldmia sp, {r0-r12}
+ ldr sp, [sp, #CTXT_SSP]
+ msr spsr, #PSR_MODE_USR
+ movs pc, lr
+
+resume_guest_domain:
+ cci r8
+ ldr r3, [r8, #OFFSET_VPSR]
+ ldr ip, [sp, #CTXT_SPSR]
+ cmp r3, #PSR_MODE_SVC
+
+ ldrne r7, =DACR_STAT_HYP
+ ldreq r7, =DACR_STAT_SVC
+ mcr p15, 0, r7, c3, c0, 0
+
+ cpsid i
+
+ RESTORE_CONTEXT
+
+/*
+ * Prototype : __switch_to(struct vcpu *, struct vcpu_guest_context *, struct vcpu_guest_context *)
+ */
+ .align 5
+ENTRY(switch_to)
+ add ip, r1, #OFFSET_VCPU_R4
+ stmia ip, {r4 - sl, fp, ip, sp, lr}
+...