search for: ldq

...could you use the load and store > alignment attribute? I'm aware of this attribute, but it doesn't help. The underlying problem is that CellSPU does not know how to natively perform byte- level addressing. For example, here's an indexed stack instruction to load register $3: ldq $3, 4($sp) In reality, the "4($sp)" doesn't mean what you think it means in the PPC and x86 worlds: that's 4 x 16 -- load quadword (ldq) appends four zero bits to the right of the offset. To get at the 4th byte requires loading from 0($sp) and some vector shuffling. (Dan: T...

...list<dag> pattern> : MABase<outs, ins, asmstr, pattern> { let subOp = subOpVal; } Finally, I don't know how to describe following instructions in MCoreInstrInfo.td, because of its variable ins/outs. Or what other files should I use to finish this description? // LDQ, STQ, LDM and STM are Mapping Error // Load/Store Register Quadrant Mode def LDQ : QuadR<0x0, // FIXME p81 (outs GPRs:$Rx), (ins GPRs:R4, GPRs:R5, GPRs:R6, GPRs:R7), "ldq R4-R7, ($Rx)", []>; def STQ : QuadR<0x1, (outs GPRs:R4, GPRs...

...stt $f2, 80(a0) + stt $f3, 88(a0) + stt $f4, 96(a0) + stt $f5, 104(a0) + stt $f6, 112(a0) + stt $f7, 120(a0) + stt $f8, 128(a0) + stt $f9, 136(a0) + ret zero,(ra),1 + + .size setjmp,.-setjmp + .end setjmp + + .type longjmp, at function + .ent longjmp, 0 + .globl longjmp +longjmp: + mov a1, v0 + ldq s0, 0(a0) + ldq s1, 8(a0) + ldq s2, 16(a0) + ldq s3, 24(a0) + ldq s4, 32(a0) + ldq s5, 40(a0) + ldq fp, 48(a0) + ldq ra, 56(a0) + ldq gp, 64(a0) + ldq sp, 72(a0) + ldt $f2, 80(a0) + ldt $f3, 88(a0) + ldt $f4, 96(a0) + ldt $f5, 104(a0) + ldt $f6, 112(a0) + ldt $f7, 120(a0) + ldt $f8,...

...08 00 3e b5 stq s0,8(sp) fffffc0000883f40: 09 04 f0 47 mov a0,s0 fffffc0000883f44: 10 00 5e b5 stq s1,16(sp) fffffc0000883f48: 0a 04 f1 47 mov a1,s1 fffffc0000883f4c: 00 00 5e b7 stq ra,0(sp) fffffc0000883f50: 40 00 69 a4 ldq t2,64(s0) fffffc0000883f54: 2e 02 43 a8 ldl_l t1,558(t2) fffffc0000883f58: 01 50 40 44 and t1,0x2,t0 fffffc0000883f5c: 03 00 20 e4 beq t0,fffffc0000883f6c <ext3_bmap+0x3c> fffffc0000883f60: 02 58 40 44 xor t1,0x2,t1 fffffc0000883f64:...

...>> alignment attribute? > > I'm aware of this attribute, but it doesn't help. The underlying > problem is that CellSPU does not know how to natively perform byte- > level addressing. For example, here's an indexed stack instruction to > load register $3: > > ldq $3, 4($sp) > > In reality, the "4($sp)" doesn't mean what you think it means in the > PPC and x86 worlds: that's 4 x 16 -- load quadword (ldq) appends four > zero bits to the right of the offset. To get at the 4th byte requires > loading from 0($sp) and some vector...

On Mon, Aug 27, 2007 at 07:26:55PM -0700, Scott Michel wrote: > It looks like I need to be able to intercept GEP lowering (in > SelectionDAGLowering::visitGetElementPtr) and insert something else > other than the shifts and adds. The basic problem is that CellSPU > loads and stores on 16-byte boundaries. Consequently, the SPU backend > has to do the load or store differently

...in the argument to the puts function in %1 is present in the bitcode. But when i use llc to change the bitcode to alpha assembly, i get the following: ldah $29,0($27) !gpdisp!1 lda $29,0($29) !gpdisp!1 $main..ng: lda $30,-32($30) stq $9,24($30) stq $11,16($30) bis $26,$26,$9 * ldq $27,puts($29) * !literal lda $11,8($30) jsr $26,($27),0 The puts call is there, but register 16 which i believe is supposed to have the arguments to a function call is not set. If i manually add the line to the assembly, lda $16, $.str($29) where $.str is defined in the assembly to be th...

It looks like I need to be able to intercept GEP lowering (in SelectionDAGLowering::visitGetElementPtr) and insert something else other than the shifts and adds. The basic problem is that CellSPU loads and stores on 16-byte boundaries. Consequently, the SPU backend has to do the load or store differently than most normal architectures that have byte-addressable operations.

...he bitcode. > But when i use llc to change the bitcode to alpha assembly, i get the > following: > > > ldah $29,0($27) !gpdisp!1 > lda $29,0($29) !gpdisp!1 > $main..ng: > lda $30,-32($30) > stq $9,24($30) > stq $11,16($30) > bis $26,$26,$9 > * ldq $27,puts($29) * !literal > lda $11,8($30) > jsr $26,($27),0 > > > The puts call is there, but register 16 which i believe is supposed to have > the arguments to a function call is not set. > If i manually add the line to the assembly, > > lda $16, $.str($29) > &...

I am applying classification methods to a dataset with 2 classes; where y=0 - non survival and y=1 - survival. When using ldq, qda, glm, gam ,etc. y=0 is assigned as class 1 and y=1 is assigned as class 0. How can I always assign y=0 as class 0 and y=1 as class 1? Thank you for your time, Heather Thiessen -.-.-.-.-.-.-.-.-.-.-.-.-.-.-.-.-.-.-.-.-.-.-.-.-.-.-.-.-.-.-.-.-.-.-.-.-.-.-.- r-help mailing list -- Read http:/...

...e the bitcode to alpha assembly, i get the >> following: >> >> >> ldah $29,0($27) !gpdisp!1 >> lda $29,0($29) !gpdisp!1 >> $main..ng: >> lda $30,-32($30) >> stq $9,24($30) >> stq $11,16($30) >> bis $26,$26,$9 >> * ldq $27,puts($29) * !literal >> lda $11,8($30) >> jsr $26,($27),0 >> >> >> The puts call is there, but register 16 which i believe is supposed to >> have the arguments to a function call is not set. >> If i manually add the line to the assembly, >> &...

...6> 0x200005dbd2c <__kill+12>: ret zero,(ra),0x1 0x200005dbd30 <__kill+16>: br gp,0x200005dbd34 <__kill+20> 0x200005dbd34 <__kill+20>: ldah gp,31(gp) 0x200005dbd38 <__kill+24>: lda gp,-1820(gp) 0x200005dbd3c <__kill+28>: ldq t12,-28064(gp) 0x200005dbd40 <__kill+32>: jmp zero,(t12),0x200005e2080 <strtoll+32> End of assembler dump >From log.nmb, (A different time, with -d 10, the log looks almost identical) [2000/08/08 14:07:38, 1] nmbd/nmbd.c:main(757) Netbios nameserver version 2.0.7 sta...

I have updated the klibc patchset based on feedback received. In particular, the patchset has been reorganized so as not to break git-bisect. Additionally, this updates the patch base to 2.6.17-git12 (d38b69689c349f35502b92e20dafb30c62d49d63) and klibc 1.4.8; the main difference on the klibc side is removal of obsolete code. This is also available as a git tree at:

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