Displaying 3 results from an estimated 3 matches for "ldaddalb_ldaddalh_ldaddalw_ldaddalx".
2017 Sep 22
2
SchedClasses
...etName(llvm::AArch64::LDADDALX);
llvm::MCInstrDesc d = II.get(llvm::AArch64::LDADDALX);
printf("name %s; class %d\n", ref.str().c_str(), d.SchedClass);
printf("microops %d\n", llvm::ThunderX2T99Model.getSchedClassDesc(d.SchedClass)->NumMicroOps);
return 0;
}
/*
LDADDALB_LDADDALH_LDADDALW_LDADDALX = 872, in Sched enum
*/
2017 Sep 29
0
SchedClasses
...trDesc d = II.get(llvm::AArch64::LDADDALX);
>
> printf("name %s; class %d\n", ref.str().c_str(), d.SchedClass);
>
> printf("microops %d\n", llvm::ThunderX2T99Model.getSchedClassDesc(d.SchedClass)->NumMicroOps);
>
> return 0;
> }
>
> /*
> LDADDALB_LDADDALH_LDADDALW_LDADDALX = 872, in Sched enum
> */
I bet the problem is that “WriteAtomic” is marked unsupported, so it gets an invalid sched class. The invalid NumMicroOps means that the scheduler will assert if it ever sees that instruction.
def : WriteRes<WriteAtomic, []> {
let Unsupported = 1;
let NumMi...
2017 Sep 30
1
SchedClasses
...;
> > printf("name %s; class %d\n", ref.str().c_str(), d.SchedClass);
> >
> > printf("microops %d\n", llvm::ThunderX2T99Model.getSchedClassDesc(d.
> SchedClass)->NumMicroOps);
> >
> > return 0;
> > }
> >
> > /*
> > LDADDALB_LDADDALH_LDADDALW_LDADDALX = 872, in Sched enum
> > */
>
> I bet the problem is that “WriteAtomic” is marked unsupported, so it gets
> an invalid sched class. The invalid NumMicroOps means that the scheduler
> will assert if it ever sees that instruction.
>
>
The scheduler does not assert if it sees...