Displaying 5 results from an estimated 5 matches for "lbb0_10".
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lbb0_1
2018 Feb 09
0
retpoline mitigation and 6.0
...we then call __x86_indirect_thunk which *does* look like
it's doing the right thing (and using the LLVM-emitted thunk instead of
my own behaves the same; I don't think it's my copy-paste at fault).
At .Ltmp29 we call bad_ioapic_register() and then when returns zero (it
does) we je to .LBB0_10 aka .Ltmp34. At which point we happily stomp on
the value of 12(%esp) by spilling something *else* over it:
.LBB0_10: # %if.end28
.Ltmp34:
#DEBUG_VALUE: mp_register_ioapic:address <- $esi
#DEBUG_VALUE: mp_register_ioapic:cfg <- [DW_OP_plus_uconst 8] [$ebp+0]...
2018 Feb 09
2
retpoline mitigation and 6.0
On Fri, 2018-02-09 at 10:36 +0000, David Woodhouse wrote:
>
> Did you get anywhere with the function attribute? Having isolated the
> next boot failure to "it goes away if I compile io_apic.c without
> retpoline", bisecting it per-function would help to further delay the
> bit where I actually have to start *thinking*...
It's mp_register_ioapic(), and only when
2018 Feb 09
3
retpoline mitigation and 6.0
...rect_thunk which *does* look like
> it's doing the right thing (and using the LLVM-emitted thunk instead of
> my own behaves the same; I don't think it's my copy-paste at fault).
>
> At .Ltmp29 we call bad_ioapic_register() and then when returns zero (it
> does) we je to .LBB0_10 aka .Ltmp34. At which point we happily stomp on
> the value of 12(%esp) by spilling something *else* over it:
>
> .LBB0_10: # %if.end28
> .Ltmp34:
> #DEBUG_VALUE: mp_register_ioapic:address <- $esi
> #DEBUG_VALUE: mp_register_ioapic...
2011 Oct 19
0
[LLVMdev] Question regarding basic-block placement optimization
....LBB0_4: # %else2
cmpl $4, 12(%r14)
jb .LBB0_6
.LBB0_6: # %else3
cmpl $5, 16(%r14)
jb .LBB0_8
.LBB0_8: # %else4
cmpl $4, 12(%r14)
jb .LBB0_10
.LBB0_10: # %exit
movl %ebx, %eax
popq %rbx
popq %r14
popq %rbp
ret
.LBB0_1: # %then1
movl %ebp, %edi
movl $1, %esi
movl %ebx, %edx
callq error...
2011 Oct 19
3
[LLVMdev] Question regarding basic-block placement optimization
On Tue, Oct 18, 2011 at 6:58 PM, Jakob Stoklund Olesen <stoklund at 2pi.dk>wrote:
>
> On Oct 18, 2011, at 5:22 PM, Chandler Carruth wrote:
>
> As for why it should be an IR pass, mostly because once the selection dag
>> runs through the code, we can never recover all of the freedom we have at
>> the IR level. To start with, splicing MBBs around requires known about