search for: latching

Displaying 20 results from an estimated 281 matches for "latching".

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2012 Feb 02
3
[LLVMdev] Updating PHI for Instruction Domination?
So I have a loop with two blocks, a header (which points to return and latch) and a latch (which points to return and header). I have inserted a few new blocks, called H and F. Header now points to H and latch. Latch now points to F. H points to F. F points to Header and return. The PHI Nodes have been updated in Header accordingly, now coming from the preheader and F (instead of latch). My
2020 Mar 20
5
CFG manipulation and !llvm.loop metadata
An HTML attachment was scrubbed... URL: <http://lists.llvm.org/pipermail/llvm-dev/attachments/20200320/34cdec77/attachment.html> -------------- next part -------------- Hi all, I have encountered some issues with the preservation of the location of llvm.loop metadata (containing optimisation hints), and would appreciate some feedback on the issue. The IR language description states that
2012 Feb 02
1
[LLVMdev] Fwd: Updating PHI for Instruction Domination?
So essentially I'm adding a path inside of the loop. Is there a way to have llvm automatically create new IR and update the PHIs simply by adding a block like this and changing the DomTree? ---------- Forwarded message ---------- From: Ryan Taylor <ryta1203 at gmail.com> Date: Thu, Feb 2, 2012 at 12:08 PM Subject: Updating PHI for Instruction Domination? To: llvmdev at cs.uiuc.edu So
2018 Jul 06
2
Verify that we only get loop metadata on latches
In https://bugs.llvm.org/show_bug.cgi?id=38011 (see also https://reviews.llvm.org/D48721) a problem was revealed related to llvm.loop metadata. The fault was that clang added the !llvm.loop metadata to branches outside of the loop (not only the loop latch). That was not handled properly by some opt passes (simplifying cfg) since it ended up merging branch instructions with different !llvm.loop
2012 Feb 03
0
[LLVMdev] Updating PHI for Instruction Domination?
Not that I'm aware of. -eric On Feb 2, 2012, at 3:47 PM, Ryan Taylor wrote: > So essentially I'm adding a path inside of the loop. Is there a way to have llvm automatically create new IR and update the PHIs simply by adding a block like this and changing the DomTree? > > ---------- Forwarded message ---------- > From: Ryan Taylor <ryta1203 at gmail.com> > Date:
2017 Nov 20
2
Nowaday Scalar Evolution's Problem.
The Problem? Nowaday, SCEV called "Scalar Evolution" does only evolate instructions that has predictable operand, Constant-Based operand. such as that can evolute as a constant. otherwise we couldn't evolate it as SCEV node, evolated as SCEVUnknown. important thing that we remember is, we do not use SCEV only for Loop Deletion, which that doesn't really needed on nature loops
2014 Aug 28
2
[LLVMdev] The problem of densemap and loop
Hello, everyone, I created a dense map like this: DenseMap<Loop *, int> ls; And I have a module which contains 3 functions: function F and it has a loop which is " Loop at depth 1 containing: %1<header><exiting>,%3,%5<latch> " function G and it has two loops which are " Loop at depth 1 containing: %8<header><exiting>,%10,%14<latch>
2013 Feb 26
2
[LLVMdev] loop metdata instruction
Hi, On 2013-02-25 8:22 PM, "Krzysztof Parzyszek" <kparzysz at codeaurora.org> wrote: >On 2/25/2013 4:50 PM, Redmond, Paul wrote: >> >> On the branch into the loop: > >Well... In this case the metadata is not on the latch. I guess this is >because the initial loop structure is this questionable >jump-to-cond-then-back scheme. I agree---this doesn't
2013 Feb 25
2
[LLVMdev] loop metdata instruction
Hi, I've been looking through past threads looking for an answer to why the loop metadata is attached to the loop latch branch. What is the reason for putting the metadata inside the loop rather than outside (for example on the branch into the loop header.) Note that I'm asking about llvm.loop.parallel not llvm.mem.parallel_loop_access which obviously must be inside the loop. It seems
2010 Aug 12
0
[LLVMdev] Questions about trip count
Dear guys, I am having problems to obtain good information from the LoopInfo. I am always getting a trip count of 0, even though I am clearly passing a loop with a constant bound. I am using this pass below: void testLoopInfo(const Function& F) const { const LoopInfo *LI = &getAnalysis<LoopInfo>(); Function::const_iterator BB = F.begin(), E = F.end(); for (; BB !=
2015 Jan 08
9
[LLVMdev] Separating loop nests based on profile information?
I've been playing with approaches to getting better optimization of loops which contain infrequently executed slow paths. I've gotten as far as throwing together a proof of concept implementation of a profile guided optimization to separate a single loop with multiple latches into a loop nest, but I want to get feedback from interested parties before investing much more effort. The
2013 Feb 25
0
[LLVMdev] loop metdata instruction
On 2/25/2013 2:08 PM, Redmond, Paul wrote: > > I've been looking through past threads looking for an answer to why the loop metadata is attached to the loop latch branch. What is the reason for putting the metadata inside the loop rather than outside (for example on the branch into the loop header.) Latch is a branch to the header. What branch in particular do you have in mind? Loop
2014 Aug 29
2
[LLVMdev] The problem of densemap and loop
Dear John, First thing, the 3 loops in Densemap are all " Loop at depth 1 containing: %1<header><exiting>,%3,%5<latch> " in the 3 functions. The dense map is in a ImmutablePass. I got it in FunctionPass and tried insert the information in this FunctionPass. So to turn the FunctionPass to ModulePass may be a better idea? Another interesting thing: if just before
2013 Feb 26
0
[LLVMdev] loop metdata instruction
On 2/25/2013 7:41 PM, Redmond, Paul wrote: > > I'm suggesting this as a possible alternative to the loop latch approach. > Please re-read my original email. Your reply seemed like you're quoting code that is currently generated, not your proposal. I'm not sure why you would want the loop metadata to be attached to some other branch. Loop latch will always exist, while, at
2017 Jun 30
2
LoopSimplify pass prevents loop unrolling
Hi All, In the attached test case there, is an unnested loop with 2 iterations. The loop latch block is terminated by an unconditional branch, so simplifycfg folds the almost empty latch block into its predecessor which is the loop header. This results in an additional backedge in the CFG, so when LoopRotate pass is called it canonicalizes the loop into a nested loop. However, now the loop
2013 Feb 25
2
[LLVMdev] loop metdata instruction
Hi, On 2013-02-25, at 5:11 PM, Krzysztof Parzyszek wrote: > On 2/25/2013 2:08 PM, Redmond, Paul wrote: >> >> I've been looking through past threads looking for an answer to why the loop metadata is attached to the loop latch branch. What is the reason for putting the metadata inside the loop rather than outside (for example on the branch into the loop header.) > >
2014 Dec 18
2
[LLVMdev] missing optimization for icmps in induction variables?
Hi all, I'm trying to get llvm to optimize away the %cmp to true in define i32 @foo(i32* %array, i32* %length_ptr, i32 %init) { entry: %length = load i32* %length_ptr, !range !0 %len.sub.1 = sub i32 %length, 1 %upper = icmp slt i32 %init, %len.sub.1 br i1 %upper, label %loop, label %exit loop: %civ = phi i32 [ %init, %entry ], [ %civ.inc, %latch ] %civ.inc = add i32 %civ, 1
2015 Jan 08
2
[LLVMdev] Separating loop nests based on profile information?
> On Jan 7, 2015, at 5:33 PM, Chandler Carruth <chandlerc at google.com> wrote: > > > On Wed, Jan 7, 2015 at 5:19 PM, Philip Reames <listmail at philipreames.com <mailto:listmail at philipreames.com>> wrote: > I've been playing with approaches to getting better optimization of loops which contain infrequently executed slow paths. I've gotten as far as
2008 Apr 10
8
[PATCH][RFC]Move PCI Configuration Spaces from Dom0 to Xen
Hi, Keir, This patch will move reading and writing of PCI configuration spaces from dom0 to Xen. It also changes VTD code, so that they can touch the PCI configuration spaces with proper lock. This will also benefit MSI support in Xen. Can you give some comments? Thanks! <<pci_conf_xen.patch>> Best Regards Haitao Shan _______________________________________________ Xen-devel
2017 Jun 30
2
LoopSimplify pass prevents loop unrolling
On 6/30/2017 7:48 AM, Balaram Makam via llvm-dev wrote: > > Edit. Predecessor -> successor. > > *From:* llvm-dev [mailto:llvm-dev-bounces at lists.llvm.org] *On Behalf > Of *Balaram Makam via llvm-dev > *Sent:* Friday, June 30, 2017 10:47 AM > *To:* llvm-dev at lists.llvm.org > *Subject:* [llvm-dev] LoopSimplify pass prevents loop unrolling > > Hi All, > >