search for: latch

Displaying 20 results from an estimated 281 matches for "latch".

Did you mean: patch
2012 Feb 02
3
[LLVMdev] Updating PHI for Instruction Domination?
So I have a loop with two blocks, a header (which points to return and latch) and a latch (which points to return and header). I have inserted a few new blocks, called H and F. Header now points to H and latch. Latch now points to F. H points to F. F points to Header and return. The PHI Nodes have been updated in Header accordingly, now coming from the preheader and F (in...
2020 Mar 20
5
CFG manipulation and !llvm.loop metadata
...t part -------------- Hi all, I have encountered some issues with the preservation of the location of llvm.loop metadata (containing optimisation hints), and would appreciate some feedback on the issue. The IR language description states that llvm.loop metadata is attached to terminator of a loop latch block, and accordingly Loop::getLoopID() searches for it in all loop latches (and only successfully finds it if all latches reference the same metadata) However, transforms which modify the CFG, for example using SplitCriticalEdge(), generally don't make any attempt to preserve this property....
2012 Feb 02
1
[LLVMdev] Fwd: Updating PHI for Instruction Domination?
...and changing the DomTree? ---------- Forwarded message ---------- From: Ryan Taylor <ryta1203 at gmail.com> Date: Thu, Feb 2, 2012 at 12:08 PM Subject: Updating PHI for Instruction Domination? To: llvmdev at cs.uiuc.edu So I have a loop with two blocks, a header (which points to return and latch) and a latch (which points to return and header). I have inserted a few new blocks, called H and F. Header now points to H and latch. Latch now points to F. H points to F. F points to Header and return. The PHI Nodes have been updated in Header accordingly, now coming from the preheader and F (in...
2018 Jul 06
2
Verify that we only get loop metadata on latches
In https://bugs.llvm.org/show_bug.cgi?id=38011 (see also https://reviews.llvm.org/D48721) a problem was revealed related to llvm.loop metadata. The fault was that clang added the !llvm.loop metadata to branches outside of the loop (not only the loop latch). That was not handled properly by some opt passes (simplifying cfg) since it ended up merging branch instructions with different !llvm.loop annotations (and then it kept the wrong metadata on the branch): ``` !2 = distinct !{!2, !3} !3 = !{!"llvm.loop.unroll.count", i32 3} !8 = distinct...
2012 Feb 03
0
[LLVMdev] Updating PHI for Instruction Domination?
...-- Forwarded message ---------- > From: Ryan Taylor <ryta1203 at gmail.com> > Date: Thu, Feb 2, 2012 at 12:08 PM > Subject: Updating PHI for Instruction Domination? > To: llvmdev at cs.uiuc.edu > > > So I have a loop with two blocks, a header (which points to return and latch) and a latch (which points to return and header). I have inserted a few new blocks, called H and F. > > Header now points to H and latch. Latch now points to F. H points to F. F points to Header and return. > > The PHI Nodes have been updated in Header accordingly, now coming from th...
2017 Nov 20
2
Nowaday Scalar Evolution's Problem.
...goto %1; %6 -> label %6; This is a current add-recurrence SCEV node emmited from SCEV. for now, %2 and %3 cannot be evoluted. we cannot calculate the backedge-taken count for this node. the SCEVAddRec node can only handle a constant variable. so it will be like.. SCEV: What is Loop-Latch? : %1 Is The Loop-Latch is only one? : Yes Is the Loop-Latch is conditional? : Yes Is The Loop-Latch has Exit? : Yes What is Loop-Latch's Exit? : %5 What is %1 value? : %2 What is %2 value? : (%1 == 4) + %3 What is first operand value? :...
2014 Aug 28
2
[LLVMdev] The problem of densemap and loop
Hello, everyone, I created a dense map like this: DenseMap<Loop *, int> ls; And I have a module which contains 3 functions: function F and it has a loop which is " Loop at depth 1 containing: %1<header><exiting>,%3,%5<latch> " function G and it has two loops which are " Loop at depth 1 containing: %8<header><exiting>,%10,%14<latch> Loop at depth 1 containing: %1<header><exiting>,%3,%5<latch> " function main and it has 3 loops which are " Loop at depth...
2013 Feb 26
2
[LLVMdev] loop metdata instruction
Hi, On 2013-02-25 8:22 PM, "Krzysztof Parzyszek" <kparzysz at codeaurora.org> wrote: >On 2/25/2013 4:50 PM, Redmond, Paul wrote: >> >> On the branch into the loop: > >Well... In this case the metadata is not on the latch. I guess this is >because the initial loop structure is this questionable >jump-to-cond-then-back scheme. I agree---this doesn't look right. This loop structure is not questionable--it's what clang generates for a for loop.. I'm suggesting this as a possible alternative to the...
2013 Feb 25
2
[LLVMdev] loop metdata instruction
Hi, I've been looking through past threads looking for an answer to why the loop metadata is attached to the loop latch branch. What is the reason for putting the metadata inside the loop rather than outside (for example on the branch into the loop header.) Note that I'm asking about llvm.loop.parallel not llvm.mem.parallel_loop_access which obviously must be inside the loop. It seems that if the metadata is at...
2010 Aug 12
0
[LLVMdev] Questions about trip count
...i++) { int j = 0; for (; j < 8; j++) { printf("%c\n", argv[i][j]); } } } It prints the following info, where all the trip counts are zero. What am I doing wrong? Hello: main Loop at depth 1 containing: %bb4<header><exiting>,%bb3<latch>,%bb2,%bb,%bb1 Loop at depth 2 containing: %bb2<header><exiting>,%bb1<latch> BB: bb Is simplifyed loop? 1 Tripcount 0 Induction variable: printing a <null> value Loop at depth 2 containing: %bb2<header><exiting>,%bb1<latch> BB: bb1 Is simpl...
2015 Jan 08
9
[LLVMdev] Separating loop nests based on profile information?
I've been playing with approaches to getting better optimization of loops which contain infrequently executed slow paths. I've gotten as far as throwing together a proof of concept implementation of a profile guided optimization to separate a single loop with multiple latches into a loop nest, but I want to get feedback from interested parties before investing much more effort. The primary case I'm concerned about looks something like this C example: while( some_condition ) //do lots of work here if (!some_rare_condition) { <-- This is loop variant...
2013 Feb 25
0
[LLVMdev] loop metdata instruction
On 2/25/2013 2:08 PM, Redmond, Paul wrote: > > I've been looking through past threads looking for an answer to why the loop metadata is attached to the loop latch branch. What is the reason for putting the metadata inside the loop rather than outside (for example on the branch into the loop header.) Latch is a branch to the header. What branch in particular do you have in mind? Loop latch identifies the loop. Loops with multiple latches are not very am...
2014 Aug 29
2
[LLVMdev] The problem of densemap and loop
Dear John, First thing, the 3 loops in Densemap are all " Loop at depth 1 containing: %1<header><exiting>,%3,%5<latch> " in the 3 functions. The dense map is in a ImmutablePass. I got it in FunctionPass and tried insert the information in this FunctionPass. So to turn the FunctionPass to ModulePass may be a better idea? Another interesting thing: if just before the insertion, I used "L -> print...
2013 Feb 26
0
[LLVMdev] loop metdata instruction
On 2/25/2013 7:41 PM, Redmond, Paul wrote: > > I'm suggesting this as a possible alternative to the loop latch approach. > Please re-read my original email. Your reply seemed like you're quoting code that is currently generated, not your proposal. I'm not sure why you would want the loop metadata to be attached to some other branch. Loop latch will always exist, while, at least at this time...
2017 Jun 30
2
LoopSimplify pass prevents loop unrolling
Hi All, In the attached test case there, is an unnested loop with 2 iterations. The loop latch block is terminated by an unconditional branch, so simplifycfg folds the almost empty latch block into its predecessor which is the loop header. This results in an additional backedge in the CFG, so when LoopRotate pass is called it canonicalizes the loop into a nested loop. However, now the loop t...
2013 Feb 25
2
[LLVMdev] loop metdata instruction
Hi, On 2013-02-25, at 5:11 PM, Krzysztof Parzyszek wrote: > On 2/25/2013 2:08 PM, Redmond, Paul wrote: >> >> I've been looking through past threads looking for an answer to why the loop metadata is attached to the loop latch branch. What is the reason for putting the metadata inside the loop rather than outside (for example on the branch into the loop header.) > > Latch is a branch to the header. What branch in particular do you have in mind? On the branch into the loop: define void @foo(i32 %n, float* %a, fl...
2014 Dec 18
2
[LLVMdev] missing optimization for icmps in induction variables?
...to true in define i32 @foo(i32* %array, i32* %length_ptr, i32 %init) { entry: %length = load i32* %length_ptr, !range !0 %len.sub.1 = sub i32 %length, 1 %upper = icmp slt i32 %init, %len.sub.1 br i1 %upper, label %loop, label %exit loop: %civ = phi i32 [ %init, %entry ], [ %civ.inc, %latch ] %civ.inc = add i32 %civ, 1 %cmp = icmp slt i32 %civ.inc, %length br i1 %cmp, label %latch, label %break latch: store i32 0, i32* %array %check = icmp slt i32 %civ.inc, %len.sub.1 br i1 %check, label %loop, label %break break: ret i32 %civ.inc exit: ret i32 42 } !0 = !{i32 0...
2015 Jan 08
2
[LLVMdev] Separating loop nests based on profile information?
...m>> wrote: > I've been playing with approaches to getting better optimization of loops which contain infrequently executed slow paths. I've gotten as far as throwing together a proof of concept implementation of a profile guided optimization to separate a single loop with multiple latches into a loop nest, but I want to get feedback from interested parties before investing much more effort. > > The primary case I'm concerned about looks something like this C example: > while( some_condition ) > //do lots of work here > if (!some_rare_condition) { <-- T...
2008 Apr 10
8
[PATCH][RFC]Move PCI Configuration Spaces from Dom0 to Xen
Hi, Keir, This patch will move reading and writing of PCI configuration spaces from dom0 to Xen. It also changes VTD code, so that they can touch the PCI configuration spaces with proper lock. This will also benefit MSI support in Xen. Can you give some comments? Thanks! <<pci_conf_xen.patch>> Best Regards Haitao Shan _______________________________________________ Xen-devel
2017 Jun 30
2
LoopSimplify pass prevents loop unrolling
...t; Of *Balaram Makam via llvm-dev > *Sent:* Friday, June 30, 2017 10:47 AM > *To:* llvm-dev at lists.llvm.org > *Subject:* [llvm-dev] LoopSimplify pass prevents loop unrolling > > Hi All, > > In the attached test case there, is an unnested loop with 2 > iterations. The loop latch block is terminated by an unconditional > branch, so simplifycfg folds the almost empty latch block into its > *successor* which is the loop header. This results in an additional > backedge in the CFG, so when LoopRotate pass is called it > canonicalizes the loop into a nested loop....