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lantech
2018 Apr 05
1
A9 Scheduler
Hi,
I am having some trouble understanding the scheduling scheme for the C-A9.
Looking at the ARMScheduleA9.td file I find this line that overrides the
target SchedWrite with processor specific latencies.
def : SchedAlias<WriteALU, A9WriteALU>;
However, in this same file, I find the lines presented below, which are
mapping the SchedReadWrite to, for example, the ANDri instruction.
//