Displaying 2 results from an estimated 2 matches for "laneidx32".
2020 Nov 18
0
Work on DAG Isel for TableGen and compiler
...def wasm_shuffle : SDNode<"WebAssemblyISD::SHUFFLE", wasm_shuffle_t>;
foreach vec_t = [v16i8, v8i16, v4i32, v2i64, v4f32, v2f64] in {
-def : Pat<(vec_t (wasm_shuffle (vec_t V128:$x), (vec_t V128:$y),
+def : Pat<(vec_t (wasm_shuffle V128:$x, (vec_t V128:$y),
(i32 LaneIdx32:$m0), (i32 LaneIdx32:$m1),
(i32 LaneIdx32:$m2), (i32 LaneIdx32:$m3),
(i32 LaneIdx32:$m4), (i32 LaneIdx32:$m5),
On Wed, Nov 18, 2020 at 12:42 PM Paul C. Anagnostopoulos <paul at windfall.com>
wrote:
> Are you talking about the type checking done in CodeGenDAGPa...
2020 Nov 18
2
Work on DAG Isel for TableGen and compiler
Are you talking about the type checking done in CodeGenDAGPatterns.cpp? Is it easy to post an example?
At 11/18/2020 01:55 PM, Thomas Lively wrote:
>Hi Paul,
>
>I think this would be time well spent. At least in the WebAssembly backend, the vast majority of our ISel work is still done with DAG ISel. I know this is different from the performance work you have in mind, but one of my