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...eing are preventing debugging/running of the program, I wouldn’t block the flip of the switch on that. What do you think? > * FastISel seems to transform division-by-constant-power-of-2 into right shift (see https://github.com/llvm-mirror/llvm/blob/master/lib/CodeGen/SelectionDAG/FastISel.cpp#L456-L468 <https://github.com/llvm-mirror/llvm/blob/master/lib/CodeGen/SelectionDAG/FastISel.cpp#L456-L468>). GlobalISel does not. It seems to me that at -O0 there may be reasons not perform this transformation, but maybe there is a good reason why FastISel does this? I think FastISel tries to ge...

I've kicked off a run to compare "-O0 -g" versus "-O0 -g -mllvm -global-isel -mllvm -global-isel-abort=2". I've selected the test-suite (albeit a version which is a couple of months old now) and a few short-running proprietary benchmarks to get data back quickly for an initial feel of where things are. This was running on Cortex-A57 AArch64 Linux. I saw one assertion

...ng in the google doc. In the meantime, I’d suggest to focus on validating the debug info on your side. > > >>> * FastISel seems to transform division-by-constant-power-of-2 into right shift (see https://github.com/llvm-mirror/llvm/blob/master/lib/CodeGen/SelectionDAG/FastISel.cpp#L456-L468 <https://github.com/llvm-mirror/llvm/blob/master/lib/CodeGen/SelectionDAG/FastISel.cpp#L456-L468>). GlobalISel does not. It seems to me that at -O0 there may be reasons not perform this transformation, but maybe there is a good reason why FastISel does this? >> >> I think Fa...

...cgi?id=32550 for this. I think this one > definitely needs fixing before enabling GlobalISel by default at -O0. > * FastISel seems to transform division-by-constant-power-of-2 into right > shift (see > https://github.com/llvm-mirror/llvm/blob/master/lib/CodeGen/SelectionDAG/FastISel.cpp#L456-L468). > GlobalISel does not. It seems to me that at -O0 there may be reasons not > perform this transformation, but maybe there is a good reason why FastISel > does this? So, FastISel on AArch64 isn't really an "O0" selector: it has a lot of smarts and peepholes, because s...

...oc. > > In the meantime, I’d suggest to focus on validating the debug info on your > side. > > > > * FastISel seems to transform division-by-constant-power-of-2 into right > shift (see > https://github.com/llvm-mirror/llvm/blob/master/lib/CodeGen/SelectionDAG/FastISel.cpp#L456-L468). > GlobalISel does not. It seems to me that at -O0 there may be reasons not > perform this transformation, but maybe there is a good reason why FastISel > does this? > > > I think FastISel tries to generate the best code it can no matter what. > For GISel O0 however, not...

...r explain the refactoring in the google doc. In the meantime, I’d suggest to focus on validating the debug info on your side. * FastISel seems to transform division-by-constant-power-of-2 into right shift (see https://github.com/llvm-mirror/llvm/blob/master/lib/CodeGen/SelectionDAG/FastISel.cpp#L456-L468). GlobalISel does not. It seems to me that at -O0 there may be reasons not perform this transformation, but maybe there is a good reason why FastISel does this? I think FastISel tries to generate the best code it can no matter what. For GISel O0 however, not doing this optimization sounds sen...

...alidating the debug info on your side. >>>> >>>>> >>>>> >>>>>>> * FastISel seems to transform division-by-constant-power-of-2 into right shift (see https://github.com/llvm-mirror/llvm/blob/master/lib/CodeGen/SelectionDAG/FastISel.cpp#L456-L468 <https://github.com/llvm-mirror/llvm/blob/master/lib/CodeGen/SelectionDAG/FastISel.cpp#L456-L468>). GlobalISel does not. It seems to me that at -O0 there may be reasons not perform this transformation, but maybe there is a good reason why FastISel does this? >>>>>> &gt...