search for: l2_pagetable_shift

Displaying 7 results from an estimated 7 matches for "l2_pagetable_shift".

2005 Aug 05
0
[patch] pae >4gb fix #1
...32/mm.c 2005-08-05 16:05:39.115794436 +0200 @@ -98,7 +98,9 @@ * installed, but at least 4MB to cover 4GB address space. This is needed * to make PCI I/O memory address lookups work in guests. */ - if ( (mpt_size = max_page * 4) < (4*1024*1024) ) +#define L2_MASK ((1<<L2_PAGETABLE_SHIFT)-1) + mpt_size = (max_page * 4 + L2_MASK) & ~L2_MASK; + if (mpt_size < 4*1024*1024) mpt_size = 4*1024*1024; for ( i = 0; i < (mpt_size >> L2_PAGETABLE_SHIFT); i++ ) { _______________________________________________ Xen-devel mailing list Xen-devel@lists.xen...
2007 Feb 12
0
[PATCH] lift physical address restriction in svae/restore code
...=================================== --- 2007-02-07.orig/tools/libxc/xc_linux_save.c 2007-02-01 17:41:07.000000000 +0100 +++ 2007-02-07/tools/libxc/xc_linux_save.c 2007-02-12 09:05:24.000000000 +0100 @@ -495,7 +495,7 @@ static int canonicalize_pagetable(unsign hstart = (hvirt_start >> L2_PAGETABLE_SHIFT_PAE) & 0x1ff; he = ((const uint64_t *) spage)[hstart]; - if ( ((he >> PAGE_SHIFT) & 0x0fffffff) == m2p_mfn0 ) { + if ( ((he >> PAGE_SHIFT) & MFN_MASK_X86) == m2p_mfn0 ) { /* hvirt starts with xen stuff... */ xen_start = hsta...
2006 Aug 31
5
x86-64''s paging_init()
While adding code to create the compatibility p2m table mappings it seemed to me that the creation of the native ones is restricted to memory below the 512G boundary - otherwise, additional L2 tables would need to be allocated (currently other memory following the one L2 page getting allocated would be blindly overwritten). While I realize that machines this big aren''t likely to be
2012 Apr 25
0
[PATCH] xen: Fix memory hotplug epfn upper limit test for updating the compat M2P table
...urn 0; - if (epfn > (RDWR_COMPAT_MPT_VIRT_END - RDWR_COMPAT_MPT_VIRT_START)) + if ( epfn > ((RDWR_COMPAT_MPT_VIRT_END - RDWR_COMPAT_MPT_VIRT_START) >> 2) ) epfn = (RDWR_COMPAT_MPT_VIRT_END - RDWR_COMPAT_MPT_VIRT_START) >> 2; emap = ( (epfn + ((1UL << (L2_PAGETABLE_SHIFT - 2)) - 1 )) &
2007 Feb 14
4
[PATCH 3/12] Provide basic Xen PM infrastructure
...r; @@ -146,6 +147,15 @@ void __init zap_low_mappings(l2_pgentry_ continue; l2e_write(&base[i], l2e_empty()); } + + flush_tlb_all_pge(); +} + +void init_low_mappings(void) +{ + memcpy(idle_pg_table_l2, + idle_pg_table_l2 + (DIRECTMAP_VIRT_START >> L2_PAGETABLE_SHIFT), + (DIRECTMAP_MBYTES << 20) >> L2_PAGETABLE_SHIFT); flush_tlb_all_pge(); } diff -r 13e258a58044 xen/arch/x86/x86_32/power/cpu.c --- a/xen/arch/x86/x86_32/power/cpu.c Wed Feb 14 11:13:40 2007 +0800 +++ b/xen/arch/x86/x86_32/power/cpu.c Wed Feb 14 14:59:56 2007 +0800 @@...
2013 Dec 06
36
[V6 PATCH 0/7]: PVH dom0....
Hi, V6: The only change from V5 is in patch #6: - changed comment to reflect autoxlate - removed a redundant ASSERT - reworked logic a bit so that get_page_from_gfn() is called with NULL for p2m type as before. arm has ASSERT wanting it to be NULL. Tim: patch 4 needs your approval. Daniel: patch 5 needs your approval. These patches implement PVH dom0. Patches 1 and 2
2013 Aug 26
5
[RFC PATCH 0/2] GLOBAL() macro for asm code.
Hello, This series has been split into two patches, one for arm and one for x86. I figured that this was easier than doing it as a single combined patch, especially as the changes are functionally independent. x86 has been boot tested, but arm has not even been compile tested as I lack a suitable cross compiler. However, the changes are just text replacement, so I dont expect any issues. The