search for: l1_cache_shift

...568. On x86, we already use a 64 byte alignment, and this code supports all current buffer sizes, from 1536 to PAGE_SIZE. #if L1_CACHE_BYTES < 64 #define MERGEABLE_BUFFER_ALIGN 64 #define MERGEABLE_BUFFER_SHIFT 6 #else #define MERGEABLE_BUFFER_ALIGN L1_CACHE_BYTES #define MERGEABLE_BUFFER_SHIFT L1_CACHE_SHIFT #endif #define MERGEABLE_BUFFER_MIN ALIGN(GOOD_PACKET_LEN + sizeof(virtio_net_hdr_mrg_rbuf), MERGEABLE_BUFFER_ALIGN) #define MERGEABLE_BUFFER_MAX min(MERGEABLE_BUFFER_MIN + (MERGEABLE_BUFFER_ALIGN...

...568. On x86, we already use a 64 byte alignment, and this code supports all current buffer sizes, from 1536 to PAGE_SIZE. #if L1_CACHE_BYTES < 64 #define MERGEABLE_BUFFER_ALIGN 64 #define MERGEABLE_BUFFER_SHIFT 6 #else #define MERGEABLE_BUFFER_ALIGN L1_CACHE_BYTES #define MERGEABLE_BUFFER_SHIFT L1_CACHE_SHIFT #endif #define MERGEABLE_BUFFER_MIN ALIGN(GOOD_PACKET_LEN + sizeof(virtio_net_hdr_mrg_rbuf), MERGEABLE_BUFFER_ALIGN) #define MERGEABLE_BUFFER_MAX min(MERGEABLE_BUFFER_MIN + (MERGEABLE_BUFFER_ALIGN...

...64 can be done on top if we see a work-load that's improved by it, which I doubt. > > #if L1_CACHE_BYTES < 64 > #define MERGEABLE_BUFFER_ALIGN 64 > #define MERGEABLE_BUFFER_SHIFT 6 > #else > #define MERGEABLE_BUFFER_ALIGN L1_CACHE_BYTES > #define MERGEABLE_BUFFER_SHIFT L1_CACHE_SHIFT > #endif > #define MERGEABLE_BUFFER_MIN ALIGN(GOOD_PACKET_LEN + > sizeof(virtio_net_hdr_mrg_rbuf), > MERGEABLE_BUFFER_ALIGN) > #define MERGEABLE_BUFFER_MAX min(MERGEABLE_BUFFER_MIN + >...

Sorry, forgot to mention - if we want to explore combining the buffer address and truesize into a single void *, we could also exploit the fact that our size ranges from aligned GOOD_PACKET_LEN to PAGE_SIZE, and potentially encode fewer values for truesize (and require a smaller alignment than 256). The prior e-mails discussion of 256 byte alignment with 256 values is just one potential design

Sorry, forgot to mention - if we want to explore combining the buffer address and truesize into a single void *, we could also exploit the fact that our size ranges from aligned GOOD_PACKET_LEN to PAGE_SIZE, and potentially encode fewer values for truesize (and require a smaller alignment than 256). The prior e-mails discussion of 256 byte alignment with 256 values is just one potential design

...gt;-- >A bad analogy is like a leaky screwdriver -- Richard Braakman > I didn''t note that ifdef before, and removing it doesn''t break dom0. I doubt the reason from following definition which is copied from Linux directly into Xen: #ifdef CONFIG_SMP # define SMP_CACHE_SHIFT L1_CACHE_SHIFT # define SMP_CACHE_BYTES L1_CACHE_BYTES #else /* * The "aligned" directive can only _increase_ alignment, so this is * safe and provides an easy way to avoid wasting space on a * uni-processor: */ # define SMP_CACHE_SHIFT 3 # define SMP_CACHE_BYTES (1 << 3) #endif For...

Hello everyone, this is the fourth version of the patch series that introduces ARMv7 with virtualization extensions support in Xen. The series allows Xen and Dom0 to boot on a Cortex-A15 based Versatile Express simulator. See the following announce email for more informations about what we are trying to achieve, as well as the original git history: See

Hello everyone, this is the very first version of the patch series that introduces ARMv7 with virtualization extensions support in Xen. The series allows Xen and Dom0 to boot on a Cortex-A15 based Versatile Express simulator. See the following announce email for more informations about what we are trying to achieve, as well as the original git history: See