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Thanks for your quick reply. I have also tried disabling build shared libs, specifying via "-DBUILD_SHARED_LIBS=OFF" in my cmake config line However I am getting the same exact error with this flag specified as well. Just an idea, would removing all llvm/clang instances/libs on my machine work? Do you know what the default location is of these shared/static llvm libraries that are

...truction to read the base of %gs directly. Maybe rdgsbase, but that's only available on Ivy Bridge and later CPUs.. But ussing %gs as part of the memory address for any other instruction is automatically relative to the base of %gs. ~Craig On Tue, Jun 26, 2018 at 12:57 PM K Jelesnianski <kjski at vt.edu> wrote: > Dear Craig, > > Thanks for the help so far. I have rewritten my assembly to comply > with user-land not being able to directly modify the segment registers > %GS/%FS. I used llvm-mc with -show-inst to get the equivalent LLVM > instruction + operands. Now I...

Dear Mr. Northover, Thank you for the quick reply. You are correct about the address-mode operands :) . I guess an important detail left out was that the basic block (call it A) that wants to calculate the address of the target stationary trampoline basic block (call it B) will be moved around in memory during run-time. Our earlier solution, before the feature was implemented to move around (A)

...from each other. So for example, if two instructions only differ in the lower case letters and one says "rr" and one says "rm", the first is the register form and the second is the memory form of the same instruction. ~Craig On Sat, Jun 23, 2018 at 7:55 PM K Jelesnianski <kjski at vt.edu> wrote: > Dear Craig, > > Thank you super much for the quick reply! Yea I'm still new to working > on the back-end and that sounds great. I already have the raw assembly > of what I want to accomplish so this is perfect. I just tried it and > yea, I will have to...

More specifically there is no instruction that can add/subtract segment registers. They can only be updated my the mov segment register instructions, opcodes 0x8c and 0x8e in x86 assembly. I suggest you write the text version of the assembly you want to generate and assemble it with llvm-mc. This will tell you if its even valid. After that you can use -show-inst to print the names of the