search for: khudia

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2011 Jul 06
2
[LLVMdev] code generation removes duplicated instructions
...Loop: Header=BB0_5 Depth=1 ldr r0, [sp, #444] add r1, sp, #53, 28 @ 848 add r0, r1, r0, lsl #2 cmp r0, r0 str r0, [sp, #384] bne .LBB0_88 b .LBB0_2 Thanks Daya On Wed, Jul 6, 2011 at 6:18 AM, Renato Golin <renato.golin at arm.com> wrote: > On 6 July 2011 02:31, D S Khudia <daya.khudia at gmail.com> wrote: > > %0 = load i32* %i, align 4 > > %HV14_ = getelementptr inbounds [100 x i32]* %a, i32 0, i32 %0 > > %1 = getelementptr inbounds [100 x i32]* %a, i32 0, i32 %0 > > %HVCmp7 = icmp ne i32* %1, %HV14_ > > br i1 %HVCmp7, l...
2011 Jul 06
2
[LLVMdev] code generation removes duplicated instructions
...RM. What other way do you suggest for duplicating since you mentioned I shouldn't rely on duplication the way I am doing it? Thanks a lot. I really appreciate your help. Daya On Wed, Jul 6, 2011 at 10:27 AM, Renato Golin <renato.golin at arm.com> wrote: > On 6 July 2011 14:55, D S Khudia <daya.khudia at gmail.com> wrote: > > The following is an example code generation for arm and x86 for a same IR > > BB. In the x86 code I can see that the same computation is done twice and > > result is stored in two different registers and then these two different > &gt...
2011 Jul 06
2
[LLVMdev] code generation removes duplicated instructions
...intrinsic call between the similar two instructions which either I'll remove or convert to nop in codegen. Does that kind of seem appropriate for the purpose here? Thanks Daya On Wed, Jul 6, 2011 at 11:55 AM, Renato Golin <renato.golin at arm.com> wrote: > On 6 July 2011 15:57, D S Khudia <daya.khudia at gmail.com> wrote: > > Since I am inserting a new basic block (contains printf statement and > > program exit) which is jumped upon based on the result of > > the comparison, the compiler cannot/shouldnot optimize that away by means > of > > DCE or an...
2011 Jul 06
0
[LLVMdev] code generation removes duplicated instructions
On 6 July 2011 14:55, D S Khudia <daya.khudia at gmail.com> wrote: > The following is an example code generation for arm and x86 for a same IR > BB. In the x86 code I can see that the same computation is done twice and > result is stored in two different registers and then these two different > registers are used...
2011 Jul 08
1
[LLVMdev] as: unrecognized option '-meabi=4'
...i, Jul 8, 2011 at 9:21 AM, raj raja <yuvaraj.addu at gmail.com> wrote: > Thanks for your reply > > I got error > > */bin/sh: build/genmodes: not found* > > I am trying to resolve it > > > Thanks > > Yuvi R > > > On Thu, Jul 7, 2011 at 8:10 PM, D S Khudia <daya.khudia at gmail.com> wrote: > >> Here is how I do it on x86-64 machine running Ubuntu-11.04: >> >> 1. install flex and bison >> 2. download arm-2011.03 from www.codesourcery.com and add to path (setenv >> PATH ${PATH}:/home/dskhudia/projects/arm-2011.03/...
2011 Jul 06
0
[LLVMdev] code generation removes duplicated instructions
On 6 July 2011 02:31, D S Khudia <daya.khudia at gmail.com> wrote: >   %0 = load i32* %i, align 4 >   %HV14_ = getelementptr inbounds [100 x i32]* %a, i32 0, i32 %0 >   %1 = getelementptr inbounds [100 x i32]* %a, i32 0, i32 %0 >   %HVCmp7 = icmp ne i32* %1, %HV14_ >   br i1 %HVCmp7, label %relExit, label %bb....
2011 Jul 06
0
[LLVMdev] code generation removes duplicated instructions
On 6 July 2011 15:57, D S Khudia <daya.khudia at gmail.com> wrote: > Since I am inserting a new basic block (contains printf statement and > program exit) which is jumped upon based on the result of > the comparison, the compiler cannot/shouldnot optimize that away by means of > DCE or anything else. It most cer...
2011 Jul 07
0
[LLVMdev] code generation removes duplicated instructions
On 7 July 2011 00:02, D S Khudia <daya.khudia at gmail.com> wrote: > I am trying to add a intrinsic call between the similar two instructions > which either I'll remove or convert to nop in codegen. If the two instructions are only similar in your real example, than you need to make them similar in your test, not...
2011 Jul 06
2
[LLVMdev] code generation removes duplicated instructions
Hello, I am duplicating few instructions in a basic block and splitting it. The following is an example. bb: ; preds = %bb1 %0 = load i32* %i, align 4 %1 = getelementptr inbounds [100 x i32]* %a, i32 0, i32 %0 store i32 0, i32* %1, align 4 %2 = load i32* %i, align 4 %3 = getelementptr inbounds [100 x i32]* %last_added, i32 0, i32 %2 store
2011 Jul 08
0
[LLVMdev] as: unrecognized option '-meabi=4'
...x86 instead of ARM, for example). > > > > You require an ARM-targetting assembler and linker. > > > > James > > > > From: llvmdev-bounces at cs.uiuc.edu [mailto:llvmdev-bounces at cs.uiuc.edu] On > Behalf Of raj raja > Sent: 08 July 2011 05:24 > To: D S Khudia > Cc: llvmdev at cs.uiuc.edu > Subject: Re: [LLVMdev] as: unrecognized option '-meabi=4' > > > > > > Hi > > > In my install directory under bin , I had > > llvm-c++,llvm-g++,llvm-gconv > > I tested one sample program > > > #llvm-c++ addu...
2011 Jul 07
1
[LLVMdev] code generation removes duplicated instructions
...utation (same as visible in x86 asm e.g. adding the one twice) for ARM. Is there a way I can achieve it? Does the problem make more sense now? Thank you for your help. Thanks Daya On Thu, Jul 7, 2011 at 4:05 AM, Renato Golin <renato.golin at arm.com> wrote: > On 7 July 2011 00:02, D S Khudia <daya.khudia at gmail.com> wrote: > > I am trying to add a intrinsic call between the similar two instructions > > which either I'll remove or convert to nop in codegen. > > If the two instructions are only similar in your real example, than > you need to make them si...
2011 Jun 14
4
[LLVMdev] code generation for ARM
Thanks for your reply. I have a normal (../configure --enable-profiling --disable-optimized --enable-assertions) llvm debug+profile+assert build. I am generating llvm-bitcode using following commands. llvm-gcc -DLINUX_i386 -DSPEC_CPU2000 -O3 -emit-llvm 186.crafty/src/valid.c -c -o 186.crafty/src/valid.bc --- llvm-link 186.crafty/src/*.bc -o 186.crafty/186.crafty.rel.bc and finally: llc
2011 Jun 29
0
[LLVMdev] specint2000 as external tests
My source directory wasn't correct but now I have a correct test directory structure. $ls -1 ~/tmp/speccpu2000/benchspec/CINT2000/164.gzip/ data docs exe result run Spec src version I reconfigured the llvm with ../configure --prefix=/home/dskhudia/tmp/llvm-install --with-llvmgccdir=/home/dskhudia/tmp/llvm-install --with-externals=/home/dskhudia/tmp Now I can execute the make -C 164.gzip but I am getting the following error. /home/dskhudia/tmp/llvm-2.9/obj/projects/test-suite/../../../projects/test-suite/RunToolSafely.sh 500 /home/dskhudia...
2011 Jul 07
0
[LLVMdev] llvm-gcc cross compiling for ARM
Here is how I do it on x86-64 machine running Ubuntu-11.04: 1. install flex and bison 2. download arm-2011.03 from www.codesourcery.com and add to path (setenv PATH ${PATH}:/home/dskhudia/projects/arm-2011.03/bin) 3. mkdir llvm-gcc-obj; cd llvm-gcc-obj 4. ../llvm-gcc-4.2-2.9.source/configure --target=arm-none-linux-gnueabi --program-prefix=llvm- --enable-llvm=/home/dskhudia/projects/llvm-2.9/obj-arm --prefix=/home/dskhudia/projects/llvm-install-arm --with-sysroot=/home/dskhudia/pr...
2011 Jun 29
3
[LLVMdev] specint2000 as external tests
Hi Duncan, Do you have sources also in the $LLVM_SRC_ROOT/projects/test-suite/External/SPEC/CINT2000/164.gzip? The following is content of above directory in my case. I have copied the CINT2000 sources in this directory manually. $ls -1 $LLVM_SRC_ROOT/projects/test-suite/External/SPEC/CINT2000/164.gzip 164.gzip.reference_output 164.gzip.reference_output.small compile_info compile_parms
2011 Jul 07
3
[LLVMdev] llvm-gcc cross compiling for ARM
Hi I am trying to cross compile llvm-gcc front for ARM target Followed below steps #../llvm-gcc-4.2-2.9.source/configure --program-prefix=llvm- --enable-llvm=/home/yuvraj/llvm/llvm-2.9 --enable-languages=c,c++ --target=arm-none-linux-gnueabi # make I am getting some kind of linker errors /opt/arm-2010.09/bin/arm-none-linux-gnueabi-ld: cannot find crtn.o: No such file or directory @ final
2011 Jun 14
1
[LLVMdev] code generation for ARM
Thank you all for the inline assembly pointer. I have some macros (FD_ZERO, FD_SET) in benchmark code which comes from C library select (synchronous I/O multiplexing) and it does contain inline assembly. Is there a way the code containing such macros can work for ARM if compiled through llvm? Thanks Daya On Tue, Jun 14, 2011 at 3:02 PM, Duncan Sands <baldrick at free.fr> wrote: > Hi
2011 Jun 29
2
[LLVMdev] specint2000 as external tests
Hi All, I am trying to configure llvm so with test-suite enabled. I have downloaded the test-suite. Spec 2000 benchmarks sources are plugged in speccpu2000 at $LLVM_SRC_ROOT/projects/test-suite-externals/speccpu2000/benchspec e.g.: 164.gzip dir is $LLVM_SRC_ROOT/projects/test-suite-externals/speccpu2000/benchspec/164.gzip My configure command is: ../configure --disable-optimized
2011 Jun 14
3
[LLVMdev] code generation for ARM
Hello, I am getting the following error while generating code for arm using llc for one of the specint2000 benchmark. Though same works for x86 target. Command => llc -march=arm 186.crafty/186.crafty.rel.bc -o 186.crafty/186.crafty.m5arm.s Error => LLVM ERROR: Couldn't allocate output reg for constraint '{cx}'! Have anyone seen this before? Is there a work around for this?
2011 Jun 30
0
[LLVMdev] specint 2000 with llvm as test-suite
Hi, Does anyone know how to fix the following error? I am compiling 254.gap as a part of test-suite with the following command in llvm-2.9/obj/projects/test-suite/External/SPEC/CINT2000. make -C 254.gap /home/dskhudia/tmp/llvm-2.9/obj/projects/test-suite/../../../projects/test-suite/RunToolSafely.sh 500 /home/dskhudia/tmp/llvm-2.9/obj/Release/bin/opt -std-compile-opts -info-output-file=/home/dskhudia/tmp/llvm-2.9/obj/projects/test-suite/External/SPEC/CINT2000/254.gap/Output/ 254.gap.linked.bc.info -stats -time-p...