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...gt; Konstantin > > From: Sameer Sahasrabuddhe [mailto:sameer at sbuddhe.net] > Sent: Sunday, July 10, 2016 4:06 AM > To: Philip Reames <listmail at philipreames.com> > Cc: Mehdi Amini <mehdi.amini at apple.com>; Liu, Yaxun (Sam) <Yaxun.Liu at amd.com>; Ke Bai <kebai613 at gmail.com>; Mekhanoshin, Stanislav <Stanislav.Mekhanoshin at amd.com>; Sumner, Brian <Brian.Sumner at amd.com>; llvm-dev at lists.llvm.org; Zhuravlyov, Konstantin <Konstantin.Zhuravlyov at amd.com>; Tye, Tony <Tony.Tye at amd.com> > Subject: Re: [llvm-dev] Memory sc...

...r not dropped at all. Thanks, Konstantin From: Sameer Sahasrabuddhe [mailto:sameer at sbuddhe.net] Sent: Sunday, July 10, 2016 4:06 AM To: Philip Reames <listmail at philipreames.com> Cc: Mehdi Amini <mehdi.amini at apple.com>; Liu, Yaxun (Sam) <Yaxun.Liu at amd.com>; Ke Bai <kebai613 at gmail.com>; Mekhanoshin, Stanislav <Stanislav.Mekhanoshin at amd.com>; Sumner, Brian <Brian.Sumner at amd.com>; llvm-dev at lists.llvm.org; Zhuravlyov, Konstantin <Konstantin.Zhuravlyov at amd.com>; Tye, Tony <Tony.Tye at amd.com> Subject: Re: [llvm-dev] Memory scope p...

...u, Konstantin -----Original Message----- From: Tom Stellard [mailto:tom at stellard.net] Sent: Wednesday, June 22, 2016 4:51 PM To: Pekka Jääskeläinen <pekka.jaaskelainen at tut.fi> Cc: Mehdi Amini <mehdi.amini at apple.com>; Liu, Yaxun (Sam) <Yaxun.Liu at amd.com>; Ke Bai <kebai613 at gmail.com>; Mekhanoshin, Stanislav <Stanislav.Mekhanoshin at amd.com>; llvm-dev at lists.llvm.org; Tye, Tony <Tony.Tye at amd.com>; Sumner, Brian <Brian.Sumner at amd.com>; Zhuravlyov, Konstantin <Konstantin.Zhuravlyov at amd.com> Subject: Re: [llvm-dev] Memory scope p...

...cope = metadata !{{i32 0, !"SingleThread"}, {i32 2, > !"WorkGroup"}, ...} > ***************************************************************** > > ================================================================= > > On Thu, Jan 28, 2016 at 12:27 PM, Ke Bai <kebai613 at gmail.com > <mailto:kebai613 at gmail.com>> wrote: > > Hi all, > > Currently, the LLVM IR uses a binary value > (SingleThread/CrossThread) to represent synchronization scope on > atomic instructions. We would like to enhance the representation >...

...ge----- >> From: Tom Stellard [mailto:tom at stellard.net] >> Sent: Wednesday, June 22, 2016 4:51 PM >> To: Pekka Jääskeläinen <pekka.jaaskelainen at tut.fi> >> Cc: Mehdi Amini <mehdi.amini at apple.com>; Liu, Yaxun (Sam) <Yaxun.Liu at amd.com>; Ke Bai <kebai613 at gmail.com>; Mekhanoshin, Stanislav <Stanislav.Mekhanoshin at amd.com>; llvm-dev at lists.llvm.org; Tye, Tony <Tony.Tye at amd.com>; Sumner, Brian <Brian.Sumner at amd.com>; Zhuravlyov, Konstantin <Konstantin.Zhuravlyov at amd.com> >> Subject: Re: [llvm-dev] Memor...

...gt; To: Philip Reames <listmail at philipreames.com <mailto:listmail at philipreames.com>> >>> Cc: Mehdi Amini <mehdi.amini at apple.com <mailto:mehdi.amini at apple.com>>; Liu, Yaxun (Sam) <Yaxun.Liu at amd.com <mailto:Yaxun.Liu at amd.com>>; Ke Bai <kebai613 at gmail.com <mailto:kebai613 at gmail.com>>; Mekhanoshin, Stanislav <Stanislav.Mekhanoshin at amd.com <mailto:Stanislav.Mekhanoshin at amd.com>>; Sumner, Brian <Brian.Sumner at amd.com <mailto:Brian.Sumner at amd.com>>; llvm-dev at lists.llvm.org <mailto:llvm-de...

Hi all, On 02.05.2016 17:46, Tom Stellard via llvm-dev wrote: >> Why not going with a metadata attachment directly and kill the "singlethread" keyword? Something like: >> >Something like: >> > >> > cmpxchg i32* %addr, i32 42, i32 0 monotonic monotonic, 3, !memory.scope{!42} >> > cmpxchg i32* %addr, i32 42, i32 0 monotonic monotonic, 3,

Hi all, Currently, the LLVM IR uses a binary value (SingleThread/CrossThread) to represent synchronization scope on atomic instructions. We would like to enhance the representation of memory scopes in LLVM IR to allow more values than just the current two. The intention of this email is to invite comments on our proposal. There are some discussion before and it can be found here:

...nic, 3 ret void } !synchscope = metadata !{{i32 0, !"SingleThread"}, {i32 2, !"WorkGroup"}, ...} ***************************************************************** ================================================================= On Thu, Jan 28, 2016 at 12:27 PM, Ke Bai <kebai613 at gmail.com> wrote: > Hi all, > > Currently, the LLVM IR uses a binary value (SingleThread/CrossThread) to > represent synchronization scope on atomic instructions. We would like to > enhance the representation of memory scopes in LLVM IR to allow more values > than just the...