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...t; > Thanks, > Pankaj > > -----Original Message----- > From: Sanjoy Das [mailto:sanjoy at playingwithpointers.com] > Sent: Tuesday, March 13, 2018 1:34 PM > To: Chawla, Pankaj <pankaj.chawla at intel.com> > Cc: Maxim Kazantsev <max.kazantsev at azul.com>; Serguei Katkov <serguei.katkov at azul.com>; llvm-dev at lists.llvm.org > Subject: Re: [SCEV] Inconsistent SCEV formation for zext > > This sounds fine to me (and sorry for the delay!). > > -- Sanjoy > > On Mon, Mar 12, 2018 at 1:09 PM, Chawla, Pankaj <pankaj.chawla at intel.com>...

...he verdict on this issue? > > Thanks, > Pankaj > > > -----Original Message----- > From: Chawla, Pankaj > Sent: Monday, February 26, 2018 11:12 AM > To: Sanjoy Das <sanjoy at playingwithpointers.com> > Cc: Maxim Kazantsev <max.kazantsev at azul.com>; Serguei Katkov <serguei.katkov at azul.com>; llvm-dev at lists.llvm.org > Subject: RE: [SCEV] Inconsistent SCEV formation for zext > > Hi Sanjoy, > >>> I'm a bit apprehensive of adding more caching to solve problems created by caching; but if there is no way out of adding another ca...

...You know the codebase better than I do. Thanks, Pankaj -----Original Message----- From: Sanjoy Das [mailto:sanjoy at playingwithpointers.com] Sent: Tuesday, March 13, 2018 1:34 PM To: Chawla, Pankaj <pankaj.chawla at intel.com> Cc: Maxim Kazantsev <max.kazantsev at azul.com>; Serguei Katkov <serguei.katkov at azul.com>; llvm-dev at lists.llvm.org Subject: Re: [SCEV] Inconsistent SCEV formation for zext This sounds fine to me (and sorry for the delay!). -- Sanjoy On Mon, Mar 12, 2018 at 1:09 PM, Chawla, Pankaj <pankaj.chawla at intel.com> wrote: > Hi Sanjoy, > >...

Hi, while taking a look at X86PadShortFunction.cpp I found that /// addPadding - Add the given number of NOOP instructions to the function /// just prior to the return at MBBI void PadShortFunc::addPadding(MachineBasicBlock *MBB, MachineBasicBlock::iterator &MBBI, unsigned int NOOPsToAdd) { DebugLoc DL = MBBI->getDebugLoc();

Hi Sanjoy, So what is the verdict on this issue? Thanks, Pankaj -----Original Message----- From: Chawla, Pankaj Sent: Monday, February 26, 2018 11:12 AM To: Sanjoy Das <sanjoy at playingwithpointers.com> Cc: Maxim Kazantsev <max.kazantsev at azul.com>; Serguei Katkov <serguei.katkov at azul.com>; llvm-dev at lists.llvm.org Subject: RE: [SCEV] Inconsistent SCEV formation for zext Hi Sanjoy, >> I'm a bit apprehensive of adding more caching to solve problems created by caching; but if there is no way out of adding another cache, how about adding...

Hi All, The landed patch https://reviews.llvm.org/D38481 introduced the usage of CPU_COUNT defined in glibc sched.h header. I failed to find this symbol in sched.h of glibc version 2.5-24, so compilation just fails. /home/dolphin/merge-from-upstream-area/ws/pristine/lib/Support/Threading.cpp: In function 'unsigned int llvm::hardware_concurrency()':

Hi Sanjoy, >> I'm a bit apprehensive of adding more caching to solve problems created by caching; but if there is no way out of adding another cache, how about adding a cache that maps SCEV expressions to their simplified versions? Then we could do something like: I may be wrong but I think caching is not an issue in itself, but caching in the presence of self-recursion is. >>

...asonic) and connect to any analog phone connected to panasonic ? I think some of Playtones application within Dial application can help me. But I don't know how. -- Pavel Zheltouhov, Comlink ISP, Voronezh, Russia phone/fax +7(0732) 727172, http://www.comlink.ru -- Sincerely yours, Andrey Katkov.

...2.5. REHL 6 ships with 2.12 and REHL ships with 2.17. I have evidence that this breaks at least on Centos 6.4 which is derived from REHL 6. This appears to break on anything REHL 6 (or earlier) derived. I think this patch needs to be reverted. Thoughts? Philip On 10/04/2017 12:08 AM, Serguei Katkov via llvm-dev wrote: Hi All, The landed patch https://reviews.llvm.org/D38481 introduced the usage of CPU_COUNT defined in glibc sched.h header. I failed to find this symbol in sched.h of glibc version 2.5-24, so compilation just fails. /home/dolphin/merge-from-upstream-area/ws/pristine/lib/Support...

...that over internally, but this seems like something we can make happen. On 10/04/2017 12:38 PM, Rui Ueyama via llvm-dev wrote: > Serguei, > > glibc 2.5 was released 11 years ago, so I wonder what operating system > you are using now. > > On Wed, Oct 4, 2017 at 12:08 AM, Serguei Katkov via llvm-dev > <llvm-dev at lists.llvm.org <mailto:llvm-dev at lists.llvm.org>> wrote: > > Hi All, > > The landed patch https://reviews.llvm.org/D38481 > <https://reviews.llvm.org/D38481> introduced the usage of > CPU_COUNT defined in glibc sc...

Hi, +CC Max, Serguei This looks like a textbook case of why caching is hard. We first call getZeroExtendExpr on %dec, and this call does end up returning an add rec. However, in the process of simplifying the zext, it also calls into isLoopBackedgeGuardedByCond which in turn calls getZeroExtendExpr(%dec) again. However, this second (recursive) time, we don't simplify the zext and cache a

...ternally, but this seems like something we can make happen. > > On 10/04/2017 12:38 PM, Rui Ueyama via llvm-dev wrote: > > Serguei, > > glibc 2.5 was released 11 years ago, so I wonder what operating system you > are using now. > > On Wed, Oct 4, 2017 at 12:08 AM, Serguei Katkov via llvm-dev < > llvm-dev at lists.llvm.org> wrote: > >> Hi All, >> >> >> >> The landed patch https://reviews.llvm.org/D38481 introduced the usage of >> CPU_COUNT defined in glibc sched.h header. >> >> I failed to find this symbol in sched...

Hi Sanjoy, SCEV is behaving inconsistently when forming SCEV for this zext instruction in the attached test case- %conv5 = zext i32 %dec to i64 If we request a SCEV for the instruction, it returns- (zext i32 {{-1,+,1}<nw><%for.body>,+,-1}<nw><%for.body7> to i64) This can be seen by invoking- $ opt -analyze -scalar-evolution inconsistent-scev-zext.ll But when computing

...come. Please let me know your thoughts. Thanks, Pankaj -----Original Message----- From: Sanjoy Das [mailto:sanjoy at playingwithpointers.com] Sent: Friday, February 09, 2018 4:46 PM To: Chawla, Pankaj <pankaj.chawla at intel.com>; Maxim Kazantsev <max.kazantsev at azul.com>; Serguei Katkov <serguei.katkov at azul.com> Cc: llvm-dev at lists.llvm.org Subject: Re: [SCEV] Inconsistent SCEV formation for zext Hi, +CC Max, Serguei This looks like a textbook case of why caching is hard. We first call getZeroExtendExpr on %dec, and this call does end up returning an add rec. Howev...

Dear Community, I'm trying to implement optimization described in PR26223 and meet the following bail out condition in CodeGenPrepare::optimizeMemoryInst. // Break use-def graph loops. if (!Visited.insert(V).second) { Consensus = nullptr; break; } So while traversing thorough phi nodes from memory instruction to find addr mode we bail out if we meet some instruction

Hello All, I filed a bug https://bugs.llvm.org/show_bug.cgi?id=35884 which I want to fix but I'm in trouble with detecting who is wrong :) The story is as follows: LoopDeletion tries to delete an invariant loop which has a def with use in some unreachable block. The IR is well-formed due to any use in unreachable block is dominated as Verifier states. LoopDeletion detected the loop as

I have an ATA-186 in a SIP configuration (following Shawn Djernes how-to), but I get the following error at the asterisk console when I try to call the phone connected to the ATA: ioctl(ZT_LOADZONE) failed: Inappropriate ioctl for device Failed to register zone 'United States / North America': No data available Everything works if I remove indications.conf from /etc/asterisk -