search for: jwei

Displaying 4 results from an estimated 4 matches for "jwei".

Did you mean: jwe
2012 Jun 14
1
[LLVMdev] non-SSA IR generation
Well, it *is* in SSA form, but it "cheats" by keeping values in memory. --Sean Silva On Wed, Jun 13, 2012 at 2:00 PM, Jiesheng Wei <jwei at ece.ubc.ca> wrote: > Hi Amruth, > > If you do not specify any optimization flag for 'clang' and do not run > 'opt -mem2reg' pass on the generated IR file, it is in non-SSA form. > However, many variables stay in memory instead of registers in this case. > &g...
2012 Jun 13
0
[LLVMdev] non-SSA IR generation
Hi Amruth, If you do not specify any optimization flag for 'clang' and do not run 'opt -mem2reg' pass on the generated IR file, it is in non-SSA form. However, many variables stay in memory instead of registers in this case. Thanks, Jiesheng On Wed, Jun 13, 2012 at 1:17 PM, <amruth.rd at knights.ucf.edu> wrote: > I am experimenting with LLVM optimizer and found that
2012 Jun 13
3
[LLVMdev] non-SSA IR generation
I am experimenting with LLVM optimizer and found that the bit code file clang emits is already in SSA form, but I want to generate it in non-SSA form. Would you let me know if there is any way of doing it? Cheera,Amruth -------------- next part -------------- An HTML attachment was scrubbed... URL:
2011 Oct 08
2
[LLVMdev] Compiling problem with steensgaard alias analysis
Hi, This is Jiesheng Wei from UBC. Now I am working on a project with LLVM and I want to use steensgaard alias analysis tool. I saw on the website that steensgaard analysis is available for LLVM 2.9 and it is under poolalloc/ directory. I downloaded several versions but none of them is compatible with LLVM 2.9. Can you please tell me which version of poolalloc is for LLVM 2.9? Thanks, Jiesheng