search for: joshimsthesis

...ite a hand coded machine instruction parser (or use something like the machine code toolkit) and then have a switch statement on the opcode to emit LLVM instructions. Of interest may be this thesis. It talks about converting alpha code to LLVM (among other things): http://llvm.org/pubs/2004-05-JoshiMSThesis.html -Chris -- http://nondot.org/sabre/ http://llvm.org/

Hi Chris, > Of interest may be this thesis. It talks about converting alpha code > to LLVM (among other things): > http://llvm.org/pubs/2004-05-JoshiMSThesis.html Thanks, it was of interest. I didn't spot its relevance from the title. Cheers, Ralph.

Hi, I'm slowly getting to grips with what makes up LLVM. I intend to use it in a machine simulator, e.g. processor, clock, RAM, UART, and other devices, where the processor will be one of several. It would take a block of target instructions, e.g. ARM, and produce LLVM to simulate those on the target machine state, and then JIT them to host instructions and then execute. The peripheral

Thank you very much for the feedback, I tried to address the brought up issues in this updated proposal. In case you have any suggestions or comments feel free to tell me. Thanks in Advance Tilmann * Proposal for Google Summer of Code Project ** Using LLVM as a backend for QEMU's dynamic binary translation *** Terms: - host architecture: the architecture of the CPU QEMU is running on