Displaying 3 results from an estimated 3 matches for "joinintervalsinmachinebb".
2005 Dec 13
1
[LLVMdev] The live interval of write-only registers
...ss, the following sequence:
add %reg1024, %reg1025, %reg1026
out %o1, %reg1024
// out is an intrinsic, there is no such machine instruction
// o1 is a write-only output register, mapping to a physical output port
cannot be changed to:
add %o1, %reg1025, %reg1026
because LiveIntervals::joinIntervalsInMachineBB() requires one of the
operands of a 'move' instruction (the 'out' intrinsic in this example)
to be a virtual register and both must be in the same register class.
Note this operation cannot be performed in the instruction selector
because %reg1024 must live after the 'out'...
2005 Dec 13
0
[LLVMdev] The live interval of write-only registers
On Tue, 13 Dec 2005, Tzu-Chien Chiu wrote:
> In my ISA, some registers are write-only. These registers serve as
> output ports, writing to these registers will output the values to an
> external device. They cannot be read. So their live intervals should
> not be joined with any other registers.
Ok. Since they are not really registers in the sense that LLVM is used
to, I
2005 Dec 13
3
[LLVMdev] The live interval of write-only registers
In my ISA, some registers are write-only. These registers serve as
output ports, writing to these registers will output the values to an
external device. They cannot be read. So their live intervals should
not be joined with any other registers.
The only way I know to do this is defining several instruction
'templates' for an opcode (of course automatically generated by a
script) similar