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You probably meant to send this to LLVMdev as well. Begin forwarded message: Date: Mon, 29 Nov 2010 08:26:03 +0100 From: Jonas Paulsson <jnspaulsson at hotmail.com> To: <edwintorok at gmail.com> Subject: RE: [LLVMdev] LLVMdev Digest, Vol 77, Issue 41 Yes, the new type is simply a static object managed by Type and LLVMContext. This is only referred to by Values of fixed point type. New instructions should not interfer with existing p...

...them to primitive instructions if there is an advantage to doing so. -Chris On Nov 29, 2010, at 2:27 AM, Török Edwin wrote: > You probably meant to send this to LLVMdev as well. > > Begin forwarded message: > > Date: Mon, 29 Nov 2010 08:26:03 +0100 > From: Jonas Paulsson <jnspaulsson at hotmail.com> > To: <edwintorok at gmail.com> > Subject: RE: [LLVMdev] LLVMdev Digest, Vol 77, Issue 41 > > > > Yes, the new type is simply a static object managed by Type and > LLVMContext. This is only referred to by Values of fixed point type. > New instruct...

...e you saying it is feasible to add intrinsics and some extra optimizers for these, then? Best regards, Jonas > Subject: Re: [LLVMdev] fixed point types > From: clattner at apple.com > Date: Mon, 29 Nov 2010 10:44:56 -0800 > CC: llvmdev at cs.uiuc.edu; edwintorok at gmail.com > To: jnspaulsson at hotmail.com > > <retitling to be useful> > > LLVM shouldn't have a fixed point type class. You should just use standard integer types. Supporting fixed point and saturation should by done by adding new operations to llvm IR. If you're interested in this, I'd su...

Hi, is it possible to reduce link time by excluding unused target backends? I would like to type tools/llc make -target=... , and just build it for one backend. /Jonas -------------- next part -------------- An HTML attachment was scrubbed... URL: <http://lists.llvm.org/pipermail/llvm-dev/attachments/20110311/c2179915/attachment.html>

Jonas Paulsson <jnspaulsson at hotmail.com> writes: > is it possible to reduce link time by excluding unused target backends? > > I would like to type > > tools/llc make -target=... , and just build it for one backend. If you build with configure && make, use the configure option --enable-targets....

On Tue, Nov 30, 2010 at 2:48 PM, Jonas Paulsson <jnspaulsson at hotmail.com> wrote: > all right, no fixed point type in LLVM :-( > > May I ask then, what could one expect from various optimizations when using > intrinsics to support the fixed point type? LTO, Value optimizations, mem ?? You'd have to implement explicit support for the new...

...cts that you know of? Did you mean that fixed point support in terms of intrinsics and code extensions could become part of the main line? Regards, Jonas Paulsson > Date: Tue, 30 Nov 2010 15:29:46 +0100 > Subject: Re: [LLVMdev] fixed point types > From: fvbommel at gmail.com > To: jnspaulsson at hotmail.com > CC: clattner at apple.com; llvmdev at cs.uiuc.edu > > On Tue, Nov 30, 2010 at 2:48 PM, Jonas Paulsson <jnspaulsson at hotmail.com> wrote: > > all right, no fixed point type in LLVM :-( > > > > May I ask then, what could one expect from various opti...

> On Thu, 25 Nov 2010 11:06:48 +0100 > Duncan Sands <baldrick at free.fr> wrote: > > > Hi Jonas, > > > > > I am investigating the possibilities of incorporating fixed point > > > support into the LLVM I/R. > > > > I think you should write a rationale explaining why you want to > > introduce new types etc rather than using the

> On Friday, November 26, 2010 4:32 PM > Jonas Paulsson <jnspaulsson at hotmail.com> wrote: > > Well, the reason DSP compilers would benefit from the new type, is that > fixed point numbers must not be optimized > as integers - eg if two saturated fixed point constants would overflow in > an addition operation, the result should as > well be s...

> > I assume you put your VLIW scheduler before the register allocator super-pass? right > > /jakob > >

...ow which COPY's would remain/eliminated? This is why I would like to do scheduling after SimpleRegCoalesc. Jonas > Date: Wed, 25 May 2011 12:11:18 +0800 > Subject: Re: [LLVMdev] Need advice on writing scheduling pass > From: etherzhhb at gmail.com > To: stoklund at 2pi.dk > CC: jnspaulsson at hotmail.com; llvmdev at cs.uiuc.edu > > > > > I assume you put your VLIW scheduler before the register allocator super-pass? > right > > > > /jakob > > > > -------------- next part -------------- An HTML attachment was scrubbed... URL: <...

...braries when cross-compiling. The C and especially math libraries make lots of assumptions about the underlying system - ABI, endianness and most importantly the assembly language for inline assembly. You will need to cross-compile a C or math library. Cheers, James From: Jonas Paulsson [mailto:jnspaulsson at hotmail.com] Sent: 11 October 2011 09:50 To: James Molloy Subject: RE: [cfe-dev] Clang, #include <math.h> well, I really just need a standard C library, to be able to do calls such as sqrt() and more. So I just want to use the standard C library already present on my (Suse11) system. The...

On Tue, Nov 30, 2010 at 05:48, Jonas Paulsson <jnspaulsson at hotmail.com> wrote: > > May I ask then, what could one expect from various optimizations when using > intrinsics to support the fixed point type? LTO, Value optimizations, mem ?? > Can you not just lower your fixed-point operations to widen, perform normal integer operation, shif...

On Fri, 26 Nov 2010 16:32:42 +0100 Jonas Paulsson <jnspaulsson at hotmail.com> wrote: > > > > > On Thu, 25 Nov 2010 11:06:48 +0100 > > Duncan Sands <baldrick at free.fr> wrote: > > > > > Hi Jonas, > > > > > > > I am investigating the possibilities of incorporating fixed > > > >...

On May 19, 2011, at 7:47 AM, Jonas Paulsson wrote: > Hi, > > I am combining 16-bit registers to a 32 bit register in order to make a wide store, as per below: > > 732 %reg16506:hi16<def,dead> = COPY %reg16445<kill>; > 740 %reg16506:lo16<def> = COPY %reg16468<kill>; > 748 %r3<def,dead> = store %reg16506<kill>, %r3, > > As you can

Hi, I am combining 16-bit registers to a 32 bit register in order to make a wide store, as per below: 732 %reg16506:hi16<def,dead> = COPY %reg16445<kill>; 740 %reg16506:lo16<def> = COPY %reg16468<kill>; 748 %r3<def,dead> = store %reg16506<kill>, %r3, As you can see, LiveVariables has marked the high part dead, even though the super-register is used at

...le. Does anyone have a better idea? > > Chip > > > ------------------------------ > > Message: 3 > Date: Thu, 19 May 2011 15:39:40 -0700 > From: Jakob Stoklund Olesen <stoklund at 2pi.dk> > Subject: Re: [LLVMdev] subregisters, def-kill > To: Jonas Paulsson <jnspaulsson at hotmail.com> > Cc: LLVMDEV <llvmdev at cs.uiuc.edu> > Message-ID: <6C95FA0C-60E9-41CD-85E5-6DA0B11E7913 at 2pi.dk> > Content-Type: text/plain; CHARSET=US-ASCII > > > On May 19, 2011, at 7:47 AM, Jonas Paulsson wrote: > > > Hi, > > > > I am co...

On Wed, Dec 1, 2010 at 8:11 AM, me22 <me22.ca at gmail.com> wrote: > On Tue, Nov 30, 2010 at 05:48, Jonas Paulsson <jnspaulsson at hotmail.com> wrote: >> May I ask then, what could one expect from various optimizations when using >> intrinsics to support the fixed point type? LTO, Value optimizations, mem ?? >> > > Can you not just lower your fixed-point operations to widen, perform > normal in...

...with GCC, which has an SSA-property verification run after each pass. It is surprising to find that LLVM does not check this! Jonas > Subject: Re: [LLVMdev] subregisters, def-kill > From: stoklund at 2pi.dk > Date: Thu, 19 May 2011 15:39:40 -0700 > CC: llvmdev at cs.uiuc.edu > To: jnspaulsson at hotmail.com > > > On May 19, 2011, at 7:47 AM, Jonas Paulsson wrote: > > > Hi, > > > > I am combining 16-bit registers to a 32 bit register in order to make a wide store, as per below: > > > > 732 %reg16506:hi16<def,dead> = COPY %reg16445<k...

...n addOperand(). If addOperand was rewritten, I think it's best not to add my fix for ProcessUses(), as I wrote earlier. Jonas Subject: Re: [LLVMdev] VirtRegRewriter.cpp: LocalRewriter::ProcessUses() From: stoklund at 2pi.dk Date: Wed, 12 Oct 2011 09:14:52 -0700 CC: llvmdev at cs.uiuc.edu To: jnspaulsson at hotmail.com On Oct 7, 2011, at 8:14 AM, Jonas Paulsson wrote:Hi, I think I've found a bug in this method. I ran it on an MI which already had two implicit-use operands, and which defined a register with a subregindex, ie reg::lo16. For the def-operand, with a subregindex, an implicit-...