Displaying 5 results from an estimated 5 matches for "jmplrr".
2011 Sep 26
1
[LLVMdev] distinguishing between real arguments and variable arguments
...D:
return 2;
}
}
In Sparc:
void Filler::insertCallUses(MachineBasicBlock::iterator MI,
SmallSet<unsigned, 32>& RegUses)
{
switch(MI->getOpcode()) {
default: llvm_unreachable("Unknown opcode.");
case SP::CALL: break;
case SP::JMPLrr:
case SP::JMPLri:
assert(MI->getNumOperands() >= 2);
const MachineOperand &Reg = MI->getOperand(0);
assert(Reg.isReg() && "JMPL first operand is not a register.");
assert(Reg.isUse() && "JMPL first operand is not a use.");...
2013 Jun 27
0
[LLVMdev] Proposal: extended MDString syntax
...%I3<kill>, <ga:@lstat>[TF=4]
%I3<def> = SLLXri %I3<kill>, 12
%I3<def> = ADDri %I3<kill>, <ga:@lstat>[TF=5]
CMPri %I2<kill>, 0, %ICC<imp-def>
%I1<def,tied2> = MOVXCCrr %I3<kill>, %I1<kill,tied0>, 9, %ICC<imp-use,kill>
JMPLrr %I1<kill>, %G0, %O0<kill>, %O1<undef>, %O0<imp-def,dead>, %O1<imp-def,dead>, %ICC<imp-def,dead>, %O6<imp-use>, ...
%O0<def> = ORrr %G0, %I0<kill>
RET 8
%G0<def> = RESTORErr %G0, %G0
We could also use more YAML structure to represent MI...
2016 Apr 15
3
[Sparc] Load address with SETHI
Hi,
I'm trying to implement __builtin_setjmp / __builtin_longjmp for Sparc processors. I think I'm very close, but I can't work out how to issue BuildMI-type instructions to load the address of the recovery location (set in setjmp) into a register using the SETHI / OR combination. I can't see any equivalent code anywhere else in Sparc.
I imagine this is similar if I try to make a
2013 Jun 26
6
[LLVMdev] Proposal: extended MDString syntax
On Wed, Jun 26, 2013 at 3:59 PM, Nadav Rotem <nrotem at apple.com> wrote:
>
> On Jun 26, 2013, at 3:51 PM, Chandler Carruth <chandlerc at google.com> wrote:
>
> Can you suggest an alternative solution? Can you describe why you don't
> think metadata is the right container? This alone isn't really helpful at
> moving us toward something that there has been
2016 Apr 27
2
[Sparc] builtin setjmp / longjmp - need help to get past last problem
...// Instruction to restore I7
+ MIB = BuildMI(*MBB, MI, DL, TII->get(SP::LDri))
+ .addReg(SP::I7)
+ .addReg(Buf, RegState::Kill)
+ .addImm(3 * PtrSize);
+ MIB.setMemRefs(MMOBegin, MMOEnd);
+
+ // Jump to JmpLoc
+ BuildMI(*MBB, MI, DL, TII->get(SP::JMPLrr)).addReg(SP::G0).addReg(JmpLoc, RegState::Kill).addReg(SP::G0);
+
+ MI->eraseFromParent();
+ return MBB;
+ }
+
+ MachineBasicBlock* SparcTargetLowering::
+ emitEHSjLjSetJmp(MachineInstr *MI,
+ MachineBasicBlock *MBB) const
+ {
+ DebugLoc DL = MI->getDebugLoc();
+ cons...