Displaying 3 results from an estimated 3 matches for "jlr".
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2019 Jan 22
2
Different SelectionDAGs for same CPU
...AG: %bb.0 '_Z9test_mathv:'
SelectionDAG has 8 nodes:
t0: ch = EntryToken
t1: i32 = add TargetFrameIndex:i32<0>, TargetConstant:i32<0>
t4: i32,ch = LDWI<Mem:(dereferenceable load 4 from %ir.a)> t1, t0
t6: ch,glue = CopyToReg t0, Register:i32 $r4, t4
t7: ch = JLR Register:i32 $r4, t6, t6:1
compiler 2
===== Instruction selection ends:
Selected selection DAG: BB#0 '_Z9test_mathv:'
SelectionDAG has 7 nodes:
t0: ch = EntryToken
t4: i32,ch = LDWI<Mem:LD4[%a](dereferenceable)> TargetFrameIndex:i32<0>, TargetConstant:i32<0>, t0...
2019 Jan 26
2
Different SelectionDAGs for same CPU
Hi Tim,
>That C++ function is probably what looks for an FrameIndex node and
>has been taught that it can be folded into the load.
How do you teach a function that a node can be folded into an instruction?
________________________________
From: Tim Northover <t.p.northover at gmail.com>
Sent: Monday, January 21, 2019 11:52 PM
To: Josh Sharp
Cc: via llvm-dev
Subject: Re: [llvm-dev]
2005 Sep 21
1
Permissions Problem
...ep 20 13:25 smb.conf.master
2979104 -rwxrwxrwx 1 root root 100 Sep 20 13:25 smbpasswd
2979105 -rwxrwxrwx 1 root root 100 Sep 20 13:25 smbpasswd.dnt
2979106 -rwxrwxrwx 1 root root 110 Sep 20 13:25 smbusers
2979107 -rwxrwxrwx 1 root root 110 Sep 20 13:25 smbusers.dnt
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------------- JLR ----------------------
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