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From e2d47e2f75bac6876b7c2eaecfe946966bf27516 Mon Sep 17 00:00:00 2001 From: Liu Jinsong <jinsong.liu@intel.com> Date: Tue, 26 Nov 2013 04:53:17 +0800 Subject: [PATCH] VMX: wbinvd when vmentry under UC This patch flush cache when vmentry back to UC guest, to prevent cache polluted by hypervisor access guest memory during UC mode. However, wbinvd is a _very_ time consuming opera...

...of country to a csv file with write.csv(). In the resulted file, ?land was coverted to <c5>land. Is there any way could prevent this happening? Thanks! > abc [1] "?land" > write.table(abc, file = "") "x" "1" "<c5>land" Best, Jinsong

...ot valid with postscript(). It seems that postscript() need to set family in postscirpt(..., family = "CNS1"). Then all the characters are in CJK font, and it's not what I hope to get. I hope the Latin character is displayed in Helvetica. Any suggestions? Thanks in advance! Regards, Jinsong -- Jinsong Zhao, Ph.D. College of Resources and Environment Huazhong Agricultural University Wuhan 430070, P.R. China E-mail: jszhao at mail.hzau.edu.cn

...u-set'' command, if it add/remove many vcpus by 1 ''xm vcpu-set'' command, it has a bug that it cannot add/remove all vcpus that want to be added/removed. This patch is to fix the bug. It delays trigger sci until all xenstore cpu node status are watched. Signed-off-by: Liu, Jinsong <jinsong.liu@intel.com> _______________________________________________ Xen-devel mailing list Xen-devel@lists.xensource.com http://lists.xensource.com/xen-devel

X86 microcode: add S3 micorcode update When wakeup from S3, use per cpu microcode image to update cpu microcode. Signed-off-by: Liu, Jinsong <jinsong.liu@intel.com> _______________________________________________ Xen-devel mailing list Xen-devel@lists.xensource.com http://lists.xensource.com/xen-devel

From 159251a04afcdcd8ca08e9f2bdfae279b2aa5471 Mon Sep 17 00:00:00 2001 From: Liu Jinsong <jinsong.liu@intel.com> Date: Thu, 31 Oct 2013 06:38:15 +0800 Subject: [PATCH 4/4] XSA-60 security hole: flush cache when vmentry back to UC guest This patch flush cache when vmentry back to UC guest, to prevent cache polluted by hypervisor access guest memory during UC mode. The elegant wa...

...sor also adds (or subtracts) value X from the IA32_TSC_ADJUST MSR; 3). If an execution of WRMSR to the IA32_TSC_ADJUST MSR adds (or subtracts) value X from that MSR, the logical processor also adds (or subtracts) value X from the TSC; With it, OS would be easier when sync tsc. Thanks, Jinsong

...stan" > abc name 1 <c5>land 2 Afghanistan And more... > dput(abc, "aa.txt") > dget("aa.txt") name 1 <c5>land 2 Afghanistan > dget("aa.txt")[,1] [1] "<c5>land" "Afghanistan" Best, Jinsong On 2020/10/20 17:13, Jinsong Zhao wrote: > Hi there, > > I tried to export the names of country to a csv file with write.csv(). > In the resulted file, ?land was coverted to <c5>land. Is there any way > could prevent this happening? Thanks! > > > abc > [1] &qu...

...is updated xen vMCE design foils, according to comments from community recently. This foils focus on vMCE part of Xen MCA, so as Keir said, it''s some dense. Later Will will present a document to elaborate more, including Intel MCA and surrounding features and Xen implementation. Thanks, Jinsong

From ba9abf6ee7e5fe0515e2d51b14743c8d5416285c Mon Sep 17 00:00:00 2001 From: Liu, Jinsong <jinsong.liu@intel.com> Date: Fri, 24 Feb 2012 02:18:02 +0800 Subject: [PATCH 2/2] Xen pad logic This patch implement Xen pad logic, and when getting pad device notification, it hypercalls to Xen hypervisor for core parking. Signed-off-by: Liu, Jinsong <jinsong.liu@intel.com> --- arc...

...or testing: xen d4352abf3450 baseline version: xen dc902ffeed73 ------------------------------------------------------------ People who touched revisions under test: Ian Jackson <ian.jackson@eu.citrix.com> Jan Beulich <jbeulich@novell.com> Liu, Jinsong <jinsong.liu@intel.com> Stefano Stabellini <stefano.stabellini@eu.citrix.com> Wei Gang <gang.wei@intel.com> ------------------------------------------------------------ jobs: build-i386-xcpkern pass build-amd64...

...f my sessionInfo() results [1] LC_CTYPE=en_CA.UTF-8 LC_NUMERIC=C [3] LC_TIME=en_CA.UTF-8 LC_COLLATE=en_CA.UTF-8 [5] LC_MONETARY=en_CA.UTF-8 LC_MESSAGES=en_CA.UTF-8 I would suggest issuing the command sessionInfo() and seeing what your encoding is. On Tue, 20 Oct 2020 at 08:22, Jinsong Zhao <jszhao at yeah.net> wrote: > Hi there, > > Why the same string is displayed in different form? > > > abc[,1] > [1] "?land" "Afghanistan" > > abc > name > 1 <c5>land > 2 Afghanistan > > And more......

...000 0.000 6 0 0 0 0 -0.001 -0.001 -0.001 -0.001 7 0 0 0 0 0.000 0.000 0.000 -0.001 8 0 0 0 0 0.000 0.000 0.000 -0.001 9 0 0 0 0 -0.009 -0.012 -0.015 -0.018 I mean how to select the first four columns. Thank you very much for your consideration on this matter. Best wishes, Jinsong ===== (Mr.) Jinsong Zhao Ph.D. Candidate School of the Environment Nanjing University 22 Hankou Road, Nanjing 210093 P.R. China E-mail: jinsong_zh at yahoo.com

...O/SRAR error xen inject to win8 guest, it always reboot. The root cause is, current Xen vMCE logic inject vMCE# only to vcpu0, this is not correct for Intel MCE (Under Intel arch, h/w generate MCE# to all CPUs). This patch fix vMCE injection bug, injecting vMCE# to all vcpus. Signed-off-by: Liu, Jinsong <jinsong.liu@intel.com> diff -r 133664c6bfb4 xen/arch/x86/cpu/mcheck/vmce.c --- a/xen/arch/x86/cpu/mcheck/vmce.c Tue Sep 18 22:39:11 2012 +0800 +++ b/xen/arch/x86/cpu/mcheck/vmce.c Tue Sep 18 23:46:38 2012 +0800 @@ -340,48 +340,27 @@ int inject_vmce(struct domain *d) { - int cpu = smp...

...ic: NaN on 6 and 0 DF, p-value: NA In this situation, step() or stepAIC() will not give any useful information. I don't know why SAS could deal with this situation: PROC REG; MODEL y=X1 X2 X3 X11 X22 X33 X12 X13 X23/SELECTION=STEPWISE; RUN; Any help will be really appreciated. Wishes, Jinsong Zhao

Hi there, I don't know why the following codes are return different results. > ifelse(3 > 2, 1:3, length(1:3)) [1] 1 > if (3 > 2) 1:3 else length(1:3) [1] 1 2 3 Any hints? Best, Jinsong

Jan, This patch just used to stick all 1''s to MCi_CTL, it should not involve much argue, so I sent it separately. Thanks, Jinsong ==================== Xen/MCE: stick all 1''s to MCi_CTL of vMCE This patch is a middle-work patch, prepare for future new vMCE model. It remove mci_ctl array, and keep MCi_CTL all 1''s. Signed-off-by: Liu, Jinsong <jinsong.liu@intel.com> diff -r 4f92bdf3370c xen/arch/x86/c...

...rd W Lisse wrote: > ?file.write() > > look for fileEncoding? > > el > There is no file.write(). I have tried fileEncoding = "utf8" and "latin1" in write.csv(). However, it does not have effect. The output is is <U+00C5>land or <c5>land. Best, Jinsong > On 20/10/2020 11:13, Jinsong Zhao wrote: >> Hi there, >> >> I tried to export the names of country to a csv file with write.csv(). In the resulted file, ?land was coverted to <c5>land. Is there any way could prevent this happening? Thanks! >> >>> abc &gt...

...ftware was in BASIC, but it still runs (DOSBOX is a friend for Linux users). That book can be obtained free from http://macnash.telfer.uottawa.ca/nlpe/. Best, JN On 11/18/2011 06:00 AM, r-help-request at r-project.org wrote: > Message: 4 > Date: Thu, 17 Nov 2011 20:42:12 +0800 > From: Jinsong Zhao <jszhao at yeah.net> > To: "r-help at r-project.org" <r-help at r-project.org> > Subject: [R] how to define the bound between parameters in nls() > Message-ID: <4EC50124.309 at yeah.net> > Content-Type: text/plain; charset=ISO-8859-1; format=flowed >...

This changeset reverts two previous corrections, for reasons that escape me. First, the domain map is again being confined to NR_CPUS, which I had submitted a patch to fix recently (yes, I realize the code has a TODO in there, but those really get forgotten about far too often). Second, the platform hypercall was reverted back to require all information to be passed to Xen in one chunk, whereas