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...44 #4 0x00401284 in mainCRTStartup () at ../mingw/crt1.c:264 Any idea what is going on here? I'm cross-posting to llvm-dev since I'm not sure if this is a Clang or LLVM codegen issue. Clang verbose output: clang version 3.2 Target: i686-pc-mingw32 Thread model: posix "C:/Users/jholewinski/projects/llvm/build/clang-x86-mingw32/bin/clang++.exe" -cc1 -triple i686-pc-mingw32 -S -disable-free -main-file-name test1.cpp -mrelocation-model static -mdisable-fp-elim -fmath-errno -mconstructor-aliases -target-cpu pentium4 -momit-leaf-frame-pointer -v -resource-dir "C:/Users/jholewins...

...7fff8f372212 in __pthread_kill () #1 0x00007fff8dc0eaf4 in pthread_kill () #2 0x00000001003a978b in raise (sig=6) at Signals.inc:345 #3 0x00000001003a9842 in abort () at Signals.inc:362 #4 0x00000001003a9821 in __assert_rtn (func=0x1003d0d14 "operator[]", file=0x1003b169e "/Users/jholewinski/projects/llvm/src/llvm/include/llvm/ADT/SmallVector.h", line=139, expr=0x1003b16e7 "begin() + idx < end()") at Signals.inc:358 #5 0x00000001000ca394 in llvm::SmallVectorTemplateCommon<llvm::EEVT::TypeSet, void>::operator[] (this=0x10384fed0, idx=1) at SmallVector.h:139 #6...

...() > #1 0x00007fff8dc0eaf4 in pthread_kill () > #2 0x00000001003a978b in raise (sig=6) at Signals.inc:345 > #3 0x00000001003a9842 in abort () at Signals.inc:362 > #4 0x00000001003a9821 in __assert_rtn (func=0x1003d0d14 "operator[]", > file=0x1003b169e > "/Users/jholewinski/projects/llvm/src/llvm/include/llvm/ADT/SmallVector.h", > line=139, expr=0x1003b16e7 "begin() + idx < end()") at Signals.inc:358 > #5 0x00000001000ca394 in > llvm::SmallVectorTemplateCommon<llvm::EEVT::TypeSet, void>::operator[] > (this=0x10384fed0, idx=1) at Sm...

...hread_kill () > #1 0x00007fff8dc0eaf4 in pthread_kill () > #2 0x00000001003a978b in raise (sig=6) at Signals.inc:345 > #3 0x00000001003a9842 in abort () at Signals.inc:362 > #4 0x00000001003a9821 in __assert_rtn (func=0x1003d0d14 "operator[]", file=0x1003b169e "/Users/jholewinski/projects/llvm/src/llvm/include/llvm/ADT/SmallVector.h", line=139, expr=0x1003b16e7 "begin() + idx < end()") at Signals.inc:358 > #5 0x00000001000ca394 in llvm::SmallVectorTemplateCommon<llvm::EEVT::TypeSet, void>::operator[] (this=0x10384fed0, idx=1) at SmallVector.h:139...

...t;> #1 0x00007fff8dc0eaf4 in pthread_kill () >> #2 0x00000001003a978b in raise (sig=6) at Signals.inc:345 >> #3 0x00000001003a9842 in abort () at Signals.inc:362 >> #4 0x00000001003a9821 in __assert_rtn (func=0x1003d0d14 "operator[]", file=0x1003b169e "/Users/jholewinski/projects/llvm/src/llvm/include/llvm/ADT/SmallVector.h", line=139, expr=0x1003b16e7 "begin() + idx < end()") at Signals.inc:358 >> #5 0x00000001000ca394 in llvm::SmallVectorTemplateCommon<llvm::EEVT::TypeSet, void>::operator[] (this=0x10384fed0, idx=1) at SmallVector.h...

...are my flows, hope it's useful to you. (At least [1] should be updated to include libclc) 1. Build LLVM/Clang with PTX support. 2. Download your PTX samples and libclc, then build them. I guess you want to pull libclc under llvm-ptx-samples/libclc/, right? --- $ git clone git://github.com/jholewinski/llvm-ptx-samples.git $ cd llvm-ptx-samples; rm -rf libclc/ $ git clone git://git.pcc.me.uk/~peter/libclc.git # Build libclc first $ cd libclc/ $ ./configure.py --with-llvm-config=/path/to/llvm-config && make # Then build your PTX samples $ cd ../; make build; cd build $ cmake ../ $ make ---...

It's not being executed. I'm both trying to print via outs() and add info via STATISTIC, neither is occurring. On Mon, Jul 14, 2014 at 12:22 PM, Justin Holewinski <jholewinski at nvidia.com> wrote: > On Mon, 2014-07-14 at 08:31 -0700, Ryan Taylor wrote: > > Where is the documentation about registering a machine pass? I'm > > unable to find it. > > > > > > I have built a machine function pass similar to the one found in > > H...

----- Original Message ----- > From: "Daniel Berlin" <dberlin at dberlin.org> > To: "Jingyue Wu" <jingyue at google.com> > Cc: "Hal Finkel" <hfinkel at anl.gov>, llvm-dev at lists.llvm.org, "Justin Holewinski" <jholewinski at nvidia.com> > Sent: Wednesday, August 12, 2015 2:03:34 PM > Subject: Re: [llvm-dev] [RFC] BasicAA considers address spaces? > > SGTM +1 -Hal > > On Wed, Aug 12, 2015 at 12:00 PM, Jingyue Wu via llvm-dev > <llvm-dev at lists.llvm.org> wrote: > > I was los...

...t [1] should be > updated to > include libclc) > > 1. Build LLVM/Clang with PTX support. > > 2. Download your PTX samples and libclc, then build them. I guess you want > to > pull libclc under llvm-ptx-samples/libclc/, right? > > --- > $ git clone git://github.com/jholewinski/llvm-ptx-samples.git > $ cd llvm-ptx-samples; rm -rf libclc/ > $ git clone git://git.pcc.me.uk/~peter/libclc.git > # Build libclc first > $ cd libclc/ > $ ./configure.py --with-llvm-config=/path/to/llvm-config && make > # Then build your PTX samples > $ cd ../; make bui...

...ements to: @a2 = global i8 addrspace(1)* @a @a = addrspace(1) global i8 0 then I get an ugly assertion failure: Assertion failed: (InitVal->getType() == getType()->getElementType() && "Initializer type must match GlobalVariable type"), function setInitializer, file /Users/jholewinski/projects/llvm/src/llvm/lib/VMCore/Globals.cpp, line 168. Looking at the debugger, I see that InitVal (the initializer for @a2) has type i8*, which looks incorrect as it drops the addrspace from the definition of @a. Before I go too far into this, should this IR work? It looks like the parser is...

...penMP representation in LLVM IR. I believe the OpenMP constructs are already lowered into libgomp calls before leaving DragonEgg. It's been awhile since I've loooked at it though. If you use the PTX back-end and have any issues, please don't hesitate to post to the list and cc: me at jholewinski at nvidia.com On Thu, Nov 8, 2012 at 8:05 AM, Apala Guha <aguha at uchicago.edu> wrote: > Hi,**** > > ** ** > > Is it possible to translate an OpenMP program to CUDA using LLVM? I read > that dragonegg has a OpenMP front-end and LLVM has a PTX back-end. I don’t > know...

Personally I feel the most intuitive approach would be to have an equivalent of isTriviallyDisjoint for IR; we already have a model for how it would work, and it could be a TTI call. I’ve kind of wanted this for a while because there’s a lot of address-space-esque aliasing relationships that can’t be easily modeled on the IR level. For example (in our model), we have some constraints like this:

...letters, compound statements with the opening brace on the line following an if/for/while/etc., single-statements after an 'if' enclosed in a compound statement, container.end() being evaluated every iterations of loops, etc, etc.. -Jim On Apr 24, 2012, at 11:50 AM, Justin Holewinski <jholewinski at nvidia.com> wrote: > Hi LLVMers, > > We at NVIDIA would like to contribute back to the LLVM open-source community by up-streaming the NVPTX back-end for LLVM. This back-end is based on the sources used by NVIDIA, and currently provides significantly more functionality than the cu...

Hi, Is it possible to translate an OpenMP program to CUDA using LLVM? I read that dragonegg has a OpenMP front-end and LLVM has a PTX back-end. I don't know how mature these tools are. Please let me know. Thanks. -Apala Postdoctoral Scholar Department of Computer Science, University of Chicago Computation Institute, Argonne National Laboratory http://sites.google.com/site/apalaguha/home/

...inal Message ----- > > From: "escha" <escha at apple.com> > > To: "Hal Finkel" <hfinkel at anl.gov> > > Cc: "Matt Arsenault" <Matthew.Arsenault at amd.com>, > llvm-dev at lists.llvm.org, "Justin Holewinski" > > <jholewinski at nvidia.com> > > Sent: Sunday, August 9, 2015 7:46:26 AM > > Subject: Re: [llvm-dev] [RFC] BasicAA considers address spaces? > > > > Personally I feel the most intuitive approach would be to have an > > equivalent of isTriviallyDisjoint for IR; we already have a m...

...wrap the arguments in some struct rather than as individual ones. We should also make it easier to extend it in the future without requiring an across the change for all in-tree and out-of-tree targets. Anyone wants to take the lead on this? Evan On Apr 19, 2012, at 8:07 AM, Justin Holewinski <jholewinski at nvidia.com> wrote: > All, > > The attached patch adds two extra arguments to TargetLowering::LowerCall: RetTy and Args. These arguments are used in TargetLowering::LowerCallTo() to construct the Ins and OutVals parameters, but are not available to the target via LowerCall(). Som...

Justin Holewinski <jholewinski at nvidia.com> writes: > The attached patch modifies the CMake/LLVMBuild scripts to build > llvm-config on Windows if sed is found on the user's PATH. It also > teaches LLVMBuild about MSVC library naming so llvm-config will > produce the proper lists of library names. > &gt...

...pace(1)* @a > @a = addrspace(1) global i8 0 > > then I get an ugly assertion failure: > > Assertion failed: (InitVal->getType() == getType()->getElementType() && > "Initializer type must match GlobalVariable type"), function setInitializer, > file /Users/jholewinski/projects/llvm/src/llvm/lib/VMCore/Globals.cpp, line > 168. > > Looking at the debugger, I see that InitVal (the initializer for @a2) has > type i8*, which looks incorrect as it drops the addrspace from the > definition of @a. > > Before I go too far into this, should this IR wo...

...: "Matt Arsenault" <Matthew.Arsenault at amd.com<mailto:Matthew.Arsenault at amd.com>> Cc: llvm-dev at lists.llvm.org<mailto:llvm-dev at lists.llvm.org>, "Hal Finkel" <hfinkel at anl.gov<mailto:hfinkel at anl.gov>>, "Justin Holewinski" <jholewinski at nvidia.com<mailto:jholewinski at nvidia.com>>, "Eli Bendersky" <eliben at google.com<mailto:eliben at google.com>>, "Xuetian Weng" <xweng at google.com<mailto:xweng at google.com>> Sent: Friday, August 7, 2015 3:44:29 PM Subject: Re: [RFC] Bas...

This question is specifically motivated by the practical constraints of NVVM, but I don't know anywhere better to ask (hopefully, e.g., @jholewinski is still following), and I believe it concerns general LLVM issues: NVIDIA's libNVVM is built on LLVM 3.2. This means its bitcode and LL text parsers are from that generation. It's interface calls for adding modules as either bitcode blobs or LL text buffers. LLVM's bitcode and assembl...