Displaying 20 results from an estimated 21 matches for "jge".
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je
2019 Sep 14
2
Side-channel resistant values
...it still doesn’t work:
int test_cmov(int left, int right, int *alt) {
return __builtin_unpredictable(left < right) ? *alt : 999;
}
Should generate:
test_cmov:
movl $999, %eax
cmpl %esi, %edi
cmovll (%rdx), %eax
retq
But currently generates:
test_cmov:
movl $999, %eax
cmpl %esi, %edi
jge .LBB0_2
movl (%rdx), %eax
.LBB0_2:
retq
> On Sep 14, 2019, at 12:18 AM, Sanjay Patel <spatel at rotateright.com> wrote:
>
> I'm not sure if this is the entire problem, but SimplifyCFG loses the 'unpredictable' metadata when it converts a set of cmp/br into a switch:...
2019 Sep 14
2
Side-channel resistant values
...mov:
>> movl $999, %eax
>> cmpl %esi, %edi
>> cmovll (%rdx), %eax
>> retq
>>
>> But currently generates:
>>
>> test_cmov:
>> movl $999, %eax
>> cmpl %esi, %edi
>> jge .LBB0_2
>> movl (%rdx), %eax
>> .LBB0_2:
>> retq
>>
>>
>>
>> > On Sep 14, 2019, at 12:18 AM, Sanjay Patel <spatel at rotateright.com> wrote:
>> >
>> > I'm not sure if this is the entire problem, but...
2012 Jun 28
0
[LLVMdev] Counting instructions in MCJIT
...;: imul 0x4(%esp),%eax
0xb7c27038 <+40>: mov %eax,(%esp)
0xb7c2703b <+43>: mov 0x4(%esp),%eax
0xb7c2703f <+47>: dec %eax
0xb7c27040 <+48>: mov %eax,0x4(%esp)
0xb7c27044 <+52>: cmp $0x2,%eax
0xb7c27047 <+55>: jge 0xb7c27030 <compute_factorial+32>
0xb7c27049 <+57>: mov (%esp),%eax
0xb7c2704c <+60>: mov %eax,0x8(%esp)
0xb7c27050 <+64>: mov 0x8(%esp),%eax
0xb7c27054 <+68>: add $0xc,%esp
0xb7c27057 <+71>: ret
End of assembler dump....
2017 Nov 21
2
question about xray tls data initialization
...ord ptr [rsp + 12], ecx
mov dword ptr [rsp + 8], 0
mov dword ptr [rsp + 4], 0
.LBB0_1: # %for.cond
# =>This Inner Loop Header: Depth=1
mov eax, dword ptr [rsp + 4]
cmp eax, dword ptr [rsp + 12]
jge .LBB0_4
# BB#2: # %for.body
# in Loop: Header=BB0_1 Depth=1
mov eax, dword ptr [rsp + 4]
add eax, dword ptr [rsp + 8]
mov dword ptr [rsp + 8], eax
# BB#3: # %for.inc...
2012 Jun 27
3
[LLVMdev] Counting instructions in MCJIT
Hi there,
I wondered whether anyone could give me any advice about counting
assembly instructions when using MCJIT?
For performance regression testing I would like to be able to count the
number of instructions generated during the jit compilation of a given
module.
The Statistic class, as far as I understand, cannot collect this data
per-module (per-ExecutionEngine/per-MCJIT), and there is
2015 Feb 13
2
[LLVMdev] trunk's optimizer generates slower code than 3.5
...--------------------------------------------------------------------
loc_100000DFA: ; CODE XREF: _main+5E j
mov ecx, [rax+r8*4]
lea r9d, [rcx+1]
mov [rax+r8*4], r9d
cmp ecx, r8d
jge loc_100000F0E
lea r12, [rax+4]
xor r14d, r14d
db 2Eh
nop word ptr [rax+rax+00000000h]
loc_100000E20: ; CODE XREF: _main+216 j
test r15d, r15d
setle cl...
2015 Feb 14
2
[LLVMdev] trunk's optimizer generates slower code than 3.5
...------
>>
>> loc_100000DFA: ; CODE XREF: _main+5E j
>> mov ecx, [rax+r8*4]
>> lea r9d, [rcx+1]
>> mov [rax+r8*4], r9d
>> cmp ecx, r8d
>> jge loc_100000F0E
>> lea r12, [rax+4]
>> xor r14d, r14d
>> db 2Eh
>> nop word ptr [rax+rax+00000000h]
>>
>> loc_100000E20: ; CODE XREF: _main+216 j
>>...
2004 Aug 06
2
preprocessor performance (was Re: Memory leak in denoiser + a few questions)
Jean-Marc Valin wrote:
>If you set the denoiser to "on" and the VAD to "off", what difference
>does it make in CPU time?
>
<p>Same program, running on Athlon XP 1700+:
Test 1, using VAD, but AGC, denoise off:
tevek@canarsie:~/work/hms/app_conference $ time ./vad_test
/tmp/demo-instruct.sw 5
reading from /tmp/demo-instruct.sw, repeating 5 times
read 537760
2015 Feb 14
2
[LLVMdev] trunk's optimizer generates slower code than 3.5
...; CODE XREF: _main+5E j
>>>> mov ecx, [rax+r8*4]
>>>> lea r9d, [rcx+1]
>>>> mov [rax+r8*4], r9d
>>>> cmp ecx, r8d
>>>> jge loc_100000F0E
>>>> lea r12, [rax+4]
>>>> xor r14d, r14d
>>>> db 2Eh
>>>> nop word ptr [rax+rax+00000000h]
>>>>
>>>> loc_100000E20:...
2019 Sep 13
3
Side-channel resistant values
> On Sep 13, 2019, at 10:45 AM, Chandler Carruth <chandlerc at gmail.com> wrote:
>
> On Fri, Sep 13, 2019 at 1:33 AM David Zarzycki via llvm-dev <llvm-dev at lists.llvm.org <mailto:llvm-dev at lists.llvm.org>> wrote:
> Hi Chandler,
>
> The data-invariant feature sounds great but what about the general case? When performance tuning code, people sometimes need
2017 Nov 16
2
question about xray tls data initialization
I'm learning the xray library and try if it can be built on windows, in
xray_fdr_logging_impl.h
line 152 , comment written as
// Using pthread_once(...) to initialize the thread-local data structures
but at line 175, 183, code written as
thread_local pthread_key_t key;
// Ensure that we only actually ever do the pthread initialization once.
thread_local bool UNUSED Unused = [] {
2001 Dec 11
0
VirtualProtect and app crash: what's your interpretation?
...09 movzx edx, al
0075F00C mov dword_75D738, ecx
0075F012 mov dword_75D730, edx
0075F018 test eax, 80000000h
0075F01D jz short loc_75F03C
0075F01F cmp edx, 4
0075F022 jge short loc_75F030
0075F024 mov dword_75D734, 1
0075F02E jmp short locret_75F046
0075F030
0075F030 loc_75F030: ; CODE XREF:
sub_75F000+22^Xj
0075F030 mov dword_75D734, 2
0075F03A jmp short...
2017 Nov 28
3
storing MBB MCSymbol in custom section
Dear llvm-dev-list,
I have created my own custom section to be added at the end into a
binary upon compilation which contains address of all basic blocks. As
the final address of the basic block is not known until link time, I
collect the MCSymbol* Symbol Values per BB in a temp array and at the
in the custom section and emit it (emitSymbolValue) into my section
within EmitEndOfAsmFile()
I have
2019 Nov 13
2
[AVR] [MSP430] Code gen improvements for 8 bit and 16 bit targets
...le=msp430 shift.ll
isNotNegativeUsingShift: ; @isNotNegativeUsingShift
; %bb.0:
inv r12
swpb r12
mov.b r12, r12
clrc
rrc r12
rra r12
rra r12
rra r12
rra r12
rra r12
rra r12
ret
isNotNegativeUsingCmp: ; @isNotNegativeUsingCmp
; %bb.0:
mov r12, r13
mov #1, r12
tst r13
jge .LBB1_2
; %bb.1:
clr r12
.LBB1_2:
ret
How do you intend to optimize code that is written in the 1st form? Or is
that not allowed in some way?
On Wed, Nov 13, 2019 at 5:52 AM Joan Lluch via llvm-dev <
llvm-dev at lists.llvm.org> wrote:
> Hi Roman,
>
> Thanks for your input.
>
&g...
2006 May 25
2
Compilation issues with s390
Hi all,
I'm trying to compile asterisk on the mainframe (s390 / s390x) and I am
running into issues. I was wondering if somebody could give a hand?
I'm thinking that I should be able to do this. I have noticed that Debian
even has binary RPM's out for Asterisk now. I'm trying to do this on SuSE
SLES8 (with the 2.4 kernel).
What I see is, an issue that arch=s390 isn't
2005 May 03
0
several ext3 and mysql kernel crashes
.../130>
28: 8b 5e 28 mov 0x28(%esi),%ebx
Code; c01fab35 <__journal_remove_journal_head+9/130> <=====
2b: 83 7b 04 00 cmpl $0x0,0x4(%ebx) <=====
Code; c01fab39 <__journal_remove_journal_head+d/130>
2f: 7d 29 jge 5a <_EIP+0x5a> c01fab64
<__journal_remove_journal_head+38/130>
Code; c01fab3b <__journal_remove_journal_head+f/130>
31: 68 e0 a4 42 c0 push $0xc042a4e0
Code; c01fab40 <__journal_remove_journal_head+14/130>
36: 68 e3 06 00 00 push $0x6e3...
2019 Nov 14
2
[AVR] [MSP430] Code gen improvements for 8 bit and 16 bit targets
...> inv r12
> swpb r12
> mov.b r12, r12
> clrc
> rrc r12
> rra r12
> rra r12
> rra r12
> rra r12
> rra r12
> rra r12
> ret
>
> isNotNegativeUsingCmp: ; @isNotNegativeUsingCmp
> ; %bb.0:
> mov r12, r13
> mov #1, r12
> tst r13
> jge .LBB1_2
> ; %bb.1:
> clr r12
> .LBB1_2:
> ret
>
> How do you intend to optimize code that is written in the 1st form? Or is
> that not allowed in some way?
>
> On Wed, Nov 13, 2019 at 5:52 AM Joan Lluch via llvm-dev <
> llvm-dev at lists.llvm.org> wrote:
>
>...
2019 Nov 13
2
[AVR] [MSP430] Code gen improvements for 8 bit and 16 bit targets
On Wed, Nov 13, 2019 at 12:26 PM Joan Lluch via llvm-dev
<llvm-dev at lists.llvm.org> wrote:
>
> Hi All,
>
> In relation to the subject of this message I got my first round of patches successfully reviewed and committed. As a matter of reference, they are the following:
>
> https://reviews.llvm.org/D69116
> https://reviews.llvm.org/D69120
>
2018 Sep 11
3
OpenJDK8 failed to work after compiled by LLVM 8 for X86
Hi Dimitry,
Thanks for your kind response!
Thanks for the commit message of Jung's patch, I found that the bug had
been fixed in OpenJDK 12 by Zhengyu
https://bugs.openjdk.java.net/browse/JDK-8205965 But only backported to
11. So Jung could backport it for OpenJDK 8, thanks a lot!
But I argue that the root cause might be in the compiler side, why
clang-3.9.1, gcc-6.4.1 couldn't
2007 Apr 18
1
[RFC/PATCH LGUEST X86_64 03/13] lguest64 core
...t, @function
+start_hyper_text:
+
+.global host_syscall
+host_syscall:
+ .quad 0
+
+#define PRINT_L(L) \
+ PRINT_OUT($L)
+
+#define PRINT_N(n) \
+ PRINT_OUT($'0' + $n)
+
+#define PRINT_HEX(n) \
+ mov n, %cl; \
+ and $0xf, %cl; \
+ cmp $0xa, %cl; \
+ jge 11f; \
+ add $'0', %cl; \
+ jmp 12f; \
+11: add $('a' - 10), %cl; \
+12: PRINT_OUT(%cl);
+
+#define PRINT_NUM_BX \
+9: PRINT_HEX(%bl); \
+ shr $4, %rbx; \
+ jne 9b
+
+#define PRINT_NUM(n) \
+ movl $n, %ebx; \
+ PRINT_NUM_...