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...SVC instructions, or exception returns """ Of course it also states that the upper limit for the Exclusives Reservation Granule is 2048 bytes, but the Cortex-M33 has an ERG of the entire address range <http://infocenter.arm.com/help/index.jsp?topic=/com.arm.doc.100230_0002_00_en/jfa1443092906126.html> so something doesn't quite add up... > OTOH that *is* an argument for performance over correctness when you > get right down to it, so I'm not sure I can be too forceful about it. > At least not without a counter-proposal to restore guaranteed > correctness. I suppose...

# RFC: Atomic LL/SC loops in LLVM revisited ## Summary This proposal gives a brief overview of the challenges of lowering to LL/SC loops and details the approach I am taking for RISC-V. Beyond getting feedback on that work, my intention is to find consensus on moving other backends towards a similar approach and sharing common code where feasible. Scroll down to 'Questions' for a summary