Displaying 20 results from an estimated 34 matches for "jf_iashvjobtbx".
2019 Sep 01
2
PowerPC Compiler Crash
...lus)" -
so that looks like a GCC ICE. Do we know what version of GCC that bot is
running?
-Hal
On 9/1/19 6:11 AM, Simon Pilgrim via llvm-dev wrote:
>
https://urldefense.proofpoint.com/v2/url?u=http-3A__lab.llvm.org-3A8011_builders_clang-2Dppc64be-2Dlinux_builds_37730_&d=DwIGaQ&c=jf_iaSHvJObTbx-siA1ZOg&r=DvnnfavFQBGT2CDyHzTr_Q&m=aNM8caPcGT7a_JHLZdYg5lruqcqw-FPR098fC46tP5o&s=8LWCCwWQfyrp--knjmyWaFZ9TScm_HlJBu1Yb10iBEY&e=
is
> an example of the ICE when D64146/rL370584 landed.
>
> On 01/09/2019 02:23, Florian Hahn via llvm-dev wrote:
>> Hi,
>>
>>...
2019 Sep 02
2
PowerPC Compiler Crash
...ike a GCC ICE. Do we know what version of GCC that bot
is
running?
-Hal
On 9/1/19 6:11 AM, Simon Pilgrim via llvm-dev wrote:
https://urldefense.proofpoint.com/v2/url?u=http-3A__lab.llvm.org-3A8011_builders_clang-2Dppc64be-2Dlinux_builds_37730_&d=DwIGaQ&c=jf_iaSHvJObTbx-siA1ZOg&r=DvnnfavFQBGT2CDyHzTr_Q&m=aNM8caPcGT7a_JHLZdYg5lruqcqw-FPR098fC46tP5o&s=8LWCCwWQfyrp--knjmyWaFZ9TScm_HlJBu1Yb10iBEY&e=
is
an example of the ICE when D64146/rL370584 landed.
On 01/09/2019 02:23, Florian Hahn via llvm-dev wrote:...
2017 Oct 03
5
General question about enabling partial inlining
...dev at lists.llvm.org <mailto:llvm-dev at lists.llvm.org>
https://urldefense.proofpoint.com/v2/url?u=http-3A__lists.llvm.org_cgi-2Dbin
_mailman_listinfo_llvm-2Ddev
<https://urldefense.proofpoint.com/v2/url?u=http-3A__lists.llvm.org_cgi-2Dbi
n_mailman_listinfo_llvm-2Ddev&d=DwIGaQ&c=jf_iaSHvJObTbx-siA1ZOg&r=4ST7e3kMd0
GTi3w9ByK5Cw&m=zEValqMYe9FvZqI-GQUgWPmVUgbEq8OBAjTrBjz9xhY&s=1h4Cw3vDlJBIknk
n0Ts3R_e3PU64h_dyvEkyCdonAVo&e=>
&d=DwIGaQ&c=jf_iaSHvJObTbx-siA1ZOg&r=4ST7e3kMd0GTi3w9ByK5Cw&m=zEValqMYe9FvZq
I-GQUgWPmVUgbEq8OBAjTrBjz9xhY&s=1h4Cw3vDlJBIknkn0Ts3...
2019 Sep 01
4
PowerPC Compiler Crash
http://lab.llvm.org:8011/builders/clang-ppc64be-linux/builds/37730/ is
an example of the ICE when D64146/rL370584 landed.
On 01/09/2019 02:23, Florian Hahn via llvm-dev wrote:
> Hi,
>
>> On Aug 31, 2019, at 15:14, Nandor Licker via llvm-dev <llvm-dev at lists.llvm.org> wrote:
>>
>> Hello PowerPC fans,
>>
>> I am attempting to land D64146 and the PowerPC
2017 Sep 13
2
General question about enabling partial inlining
Hi,
I noticed some performance gains in some spec benchmarks without
significant code size bloat when aggressively performing partial
inlining, especially when the original callee spill CSRs in the entry
block. I guess the partial inlining is not enabled mainly due to the
code size. Is there any other issue which prevent the pass from being
enabled? Do we have any plan or any on-going works
2017 Nov 02
13
[RFC] Enable Partial Inliner by default
Forgot to add that all experiments were done with '-O3 -m64
-fexperimental-new-pass-manager'.
Graham Yiu
LLVM Compiler Development
IBM Toronto Software Lab
Office: (905) 413-4077 C2-707/8200/Markham
Email: gyiu at ca.ibm.com
From: Graham Yiu/Toronto/IBM
To: llvm-dev at lists.llvm.org
Cc: junbuml at codeaurora.org, xinliangli at gmail.com
Date: 11/02/2017 05:26 PM
Subject: [RFC]
2017 Nov 10
0
[RFC] Enable Partial Inliner by default
...t a more
> reasonable increase of 0.58%.
>
> NOTE2: There is a patch up for review on Phabricator to enhance the
> partial
> inliner with the presence of profiling information (
>
https://urldefense.proofpoint.com/v2/url?u=https-3A__reviews.llvm.org_D38190&d=DwIGaQ&c=jf_iaSHvJObTbx-siA1ZOg&r=4ST7e3kMd0GTi3w9ByK5Cw&m=sY89ox2ivgmox5Vg311rAsEr4WFT-o-LRopDU9e7rl0&s=6o17wydYZM0l4kPAb3l3cJ95JRPoYb-3l4sHv-R0GaA&e=
).
>
>
> Graham Yiu
> LLVM Compiler Development
> IBM Toronto Software Lab
> Office: (905) 413-4077 C2-707/8200/Markham
>...
2020 Oct 02
2
[RFC] Adding a char set converter to Support library
My understanding is that dynamically linking should pose no problem, but I
am no lawyer. On Linux, glibc is also under LGPL license, and LLVM usually
links against it.
(There is really no need for us to depend on libiconv. If it is deemed to
risky, then I can dropped it.)
From: Anton Korobeynikov <anton at korobeynikov.info>
To: Kai Peter Nacke <kai.nacke at de.ibm.com>
Cc:
2019 May 15
3
Delinearization validity checks in DependenceAnalysis
...int a[][m] case too).
See this comment for why they were needed and perhaps a better way to fix
it:
https://urldefense.proofpoint.com/v2/url?u=https-3A__github.com_llvm_llvm-2Dproject_commit_d143c65de3c884d09197da279d2f04f094efaf15-23diff-2D57473b376037dd3637516348b9b02556L3274&d=DwIFAw&c=jf_iaSHvJObTbx-siA1ZOg&r=aihobyOnVzXW7OPSK1-NiSYQkq7oP3ZSUVc4BemvrVo&m=46eKxI_sFjjeBzn7X-OLXSEUwHN-HVCD16TF9OuyIqc&s=adPvJDhPtFMlaTWihZmvWjXqFUFHDnzcV84oaDGlryM&e=
Any improvements to the delinearisation code would be most welcome.
Dave
From: llvm-dev <llvm-dev-bounces at lists.llvm.org&g...
2017 Nov 10
5
[RFC] Enable Partial Inliner by default
...t a more
> reasonable increase of 0.58%.
>
> NOTE2: There is a patch up for review on Phabricator to enhance the
> partial
> inliner with the presence of profiling information (
> https://urldefense.proofpoint.com/v2/url?u=https-3A__reviews.llvm.org_D38190&d=DwIGaQ&c=jf_iaSHvJObTbx-siA1ZOg&r=4ST7e3kMd0GTi3w9ByK5Cw&m=sY89ox2ivgmox5Vg311rAsEr4WFT-o-LRopDU9e7rl0&s=6o17wydYZM0l4kPAb3l3cJ95JRPoYb-3l4sHv-R0GaA&e=).
>
>
> Graham Yiu
> LLVM Compiler Development
> IBM Toronto Software Lab
> Office: (905) 413-4077 C2-707/8200/Markham
> Email:...
2019 Oct 24
2
Failed PPC64 compile when using Power7 loads and stores?
Hi Everyone,
I'm having trouble figuring out a compile failure on ppc64le. The
failure is at https://travis-ci.org/noloader/cryptopp-autotools/jobs/602187190
. The message is:
/bin/bash ./libtool --tag=CXX --mode=compile clang++
-DHAVE_CONFIG_H -I. -DCRYPTOPP_DISABLE_POWER8 -pipe -mcpu=power7
-mvsx -maltivec -g -O2 -MT libppc_power7_la-ppc_power7.lo -MD -MP -MF
2019 May 30
3
Loop Optimization Working Group
Dear LLVM community,
we would like to form a working group that focuses on loop
optimizations and the loop optimization pipeline in LLVM. This working
group would meet at a regular cadence (weekly or bi-weekly depending
on people's schedules) and discuss topics relevant to loop
optimizations. These topics would include:
- Implementation of current loop optimizations
- Proposals for
2017 Oct 03
2
PGO information at LTO/thinLTO link step
Thanks Easwaran. This is what we've observed as well, where the old PM
inliner was only looking hot/cold callee information, which have
signficantly smaller boosts/penalties compared to callsite information.
Teresa, do you know if there is some documentation/video/presentation on
how PGO information is represented in LLVM and what information is passed
via the IR? I'm finding some
2020 Jul 15
2
Regarding the project "Create LoopNestPass"
Hi,
I'm a college student who is quite new to the community and is interested
in contributing to the LLVM project. Although I haven't applied to GSoC, I
notice that the project "Create LoopNestPass" seems to be unassigned.
So I'm curious whether anyone is currently working on it, and if not, is it
possible for me to work on it as a side-project?
I've been programming in
2019 Sep 13
3
Loop Opt WG Meeting Minutes for Sep 11, 2019
Thanks Florian.
Tim you said:
> Some cases can be undone by rematerialization, but not all, and it can
involve a lot of effort which increases compile time.
Do you have examples of cases where rematerialization is not possible? We
are interested in learning about any previous attempts at trying to address
the issue in RA. Have you tried it?
Bardia Mahjour
Compiler Optimizations
IBM Toronto
2017 Nov 13
2
[RFC] Enable Partial Inliner by default
...t a more
> reasonable increase of 0.58%.
>
> NOTE2: There is a patch up for review on Phabricator to enhance the
> partial
> inliner with the presence of profiling information (
> https://urldefense.proofpoint.com/v2/url?u=https-3A__reviews.llvm.org_D38190&d=DwIGaQ&c=jf_iaSHvJObTbx-siA1ZOg&r=4ST7e3kMd0GTi3w9ByK5Cw&m=sY89ox2ivgmox5Vg311rAsEr4WFT-o-LRopDU9e7rl0&s=6o17wydYZM0l4kPAb3l3cJ95JRPoYb-3l4sHv-R0GaA&e=).
>
>
> Graham Yiu
> LLVM Compiler Development
> IBM Toronto Software Lab
> Office: (905) 413-4077 C2-707/8200/Markham
> Email:...
2020 Jul 07
6
[RFC] C++20 ABI issue on several platforms
Hello,
as discussed here in more detail: https://reviews.llvm.org/D81583
the introduction of the C++20 [[no_unique_address]] attribute exposes an
ABI issue on platforms that require special handling for structs/classes
that are "equivalent" to a single floating-point member (or in some cases,
a "homogeneous" set of floating-point members). This is because we can now
for the
2020 Apr 09
3
Applying patches from Phabricator?
Hello,
Is there a way for Phabricator to retain the patches as originally uploaded?
When using the "Download Raw Diff" button, it seems Phabricator reformats the patch, loosing the parent commit along the way, so often patches don't apply.
The following works, because I've got the latest checkout on master, and the patch was rebased recently:
F:\llvm-project>curl
2017 Oct 03
2
PGO information at LTO/thinLTO link step
Hi Teresa,
Actually, enabling the new pass manager manually seems to have solved this
issue, so this problem is only valid for the old pass manager.
Thanks,
Graham Yiu
LLVM Compiler Development
IBM Toronto Software Lab
Office: (905) 413-4077 C2-707/8200/Markham
Email: gyiu at ca.ibm.com
From: Teresa Johnson <tejohnson at google.com>
To: Graham Yiu <gyiu at ca.ibm.com>
Cc:
2019 May 16
2
Delinearization validity checks in DependenceAnalysis
....
>
> See this comment for why they were needed and perhaps a better way to fix
> it:
> https://urldefense.proofpoint.com/v2/url?u=https-3A__github.com_llvm_llvm-2Dproject_commit_d143c65de3c884d09197da279d2f04f094efaf15-23diff-2D57473b376037dd3637516348b9b02556L3274&d=DwIFAw&c=jf_iaSHvJObTbx-siA1ZOg&r=aihobyOnVzXW7OPSK1-NiSYQkq7oP3ZSUVc4BemvrVo&m=46eKxI_sFjjeBzn7X-OLXSEUwHN-HVCD16TF9OuyIqc&s=adPvJDhPtFMlaTWihZmvWjXqFUFHDnzcV84oaDGlryM&e=
>
>
> Any improvements to the delinearisation code would be most welcome.
> Dave
>
>
>
>
> From: llvm...