Displaying 20 results from an estimated 40 matches for "jaykang10".
2012 Jan 29
1
[LLVMdev] dragonegg arm patch
...-gnu.tar.bz2"
You can find this file on https://sourcery.mentor.com/sgpp/lite/arm/portal/release1600.
(Please click "IA32 GNU/Linux TAR" on Packages.)
2. Extract this file on your linux machine.
3. Add "bin" directory of extracted file to PATH.
(ex: PATH=$PATH:"/home/jaykang10/Projects/ARM/arm-2010.09/bin)
4. configure gcc-4.6 as following. (I used gcc-4.6.2)
"source directory"/configure --prefix="install directory"
--target="ARM target"
--with-gnu-as="ARM assembler"
--with-gnu-ld="ARM linker"
--with-sysroot="di...
2009 Oct 07
2
[LLVMdev] llvm-gcc configure options for ARM target at llvm-gcc build time
Dear LLVM members.
I am building llvm-gcc in version 2.5 for ARM target.
I used command line option as following:
>../src/configure --prefix=/home/jaykang10/Projects/LLVM/front_end_test/bin/ --enable-languages=c,c++ --enable-checking --enable-llvm=/home/jaykang10/Projects/LLVM/bin/ --disable-bootstrap --disable-multilib --target=arm-eabi
And I got a error message as following:
...
gcc -c -g -O2 -DIN_GCC -DCROSS_DIRECTORY_STRUCTURE -W -Wall -Wwrite-str...
2012 Jan 29
0
[LLVMdev] dragonegg arm patch
Hi Jin-Gu,
> I made a patch for dragonegg. This patch is for dragonegg to generate arm
> assembly code.
thanks for working on this.
>
> Dragonegg is compiled with this patch after building gcc-4.6 as cross compiler
> for arm and
>
> then dragonegg can generate arm assembly code.
>
> It currently makes errors to build dragonegg and llvm from svn. so I made a
> patch
2012 Jan 29
3
[LLVMdev] dragonegg arm patch
Hi Duncan,
I made a patch for dragonegg. This patch is for dragonegg to generate arm assembly code.
Dragonegg is compiled with this patch after building gcc-4.6 as cross compiler for arm and
then dragonegg can generate arm assembly code.
It currently makes errors to build dragonegg and llvm from svn. so I made a patch using
dragonegg-3.0 source code. (This patch doesn't support
2009 Sep 30
5
[LLVMdev] long double type on ARM
...ils-7.4 package for ARM linux using LLVM 2.5 version.
When i compiled 'od' program in coreutils package using LLVM 2.5,
i could see the error message on llc processing.
> llvm-gcc -emit-llvm ./od.c -c -o ./od.bc -other-options...
> llc -march=arm ./od.bc -f -o ./od.s
llc: /home/jaykang10/HardDisk2/Projects/LLVM/src/llvm-2.5/lib/Target/TargetData.cpp:305: unsigned int llvm::TargetData::getAlignmentInfo(llvm::AlignTypeEnum, uint32_t, bool, const llvm::Type*) const: Assertion `AlignType == VECTOR_ALIGN && "Unknown alignment type!"' failed.
The problem was that
w...
2009 Sep 30
0
[LLVMdev] long double type on ARM
...2.5
> version.
>
> When i compiled 'od' program in coreutils package using LLVM 2.5,
> i could see the error message on llc processing.
>
> > llvm-gcc -emit-llvm ./od.c -c -o ./od.bc -other-options...
> > llc -march=arm ./od.bc -f -o ./od.s
> llc: /home/jaykang10/HardDisk2/Projects/LLVM/src/llvm-2.5/lib/Target/
> TargetData.cpp:305: unsigned int llvm::TargetData::getAlignmentInfo
> (llvm::AlignTypeEnum, uint32_t, bool, const llvm::Type*) const:
> Assertion `AlignType == VECTOR_ALIGN && "Unknown alignment type!"'
> fai...
2016 Jun 28
0
Question about VectorLegalizer::ExpandStore() with v4i1
Hi All,
Can someone comment below question whether it is wrong or not please?
2016-06-25 7:52 GMT+01:00 jingu kang <jaykang10 at gmail.com>:
> Hi All,
>
> I have a problem with VectorLegalizer::ExpandStore() with v4i1.
>
> Let's see a example.
>
> * LLVM IR
> store <4 x i1> %edgeMask_for.body1314, <4 x i1>* %27
>
> * SelectionDAG before vector legalization
> ch = store&l...
2009 Sep 30
0
[LLVMdev] long double type on ARM
...inux using LLVM 2.5 version.
> When i compiled 'od' program in coreutils package using LLVM 2.5,
> i could see the error message on llc processing.
> > llvm-gcc -emit-llvm ./od.c -c -o ./od.bc /-other-options.../
> > llc -march=arm ./od.bc -f -o ./od.s
> llc:
> /home/jaykang10/HardDisk2/Projects/LLVM/src/llvm-2.5/lib/Target/TargetData.cpp:305:
> unsigned int llvm::TargetData::getAlignmentInfo(llvm::AlignTypeEnum,
> uint32_t, bool, const llvm::Type*) const: Assertion `AlignType ==
> VECTOR_ALIGN && "Unknown alignment type!"' failed.
> The...
2016 Jun 25
2
Question about VectorLegalizer::ExpandStore() with v4i1
Hi All,
I have a problem with VectorLegalizer::ExpandStore() with v4i1.
Let's see a example.
* LLVM IR
store <4 x i1> %edgeMask_for.body1314, <4 x i1>* %27
* SelectionDAG before vector legalization
ch = store<ST1[%16](align=4), trunc to v4i1> t0, t128, t32, undef:i64
* SelectionDAG after vector legalization
ch = store<ST1[%16](align=4), trunc to i1> t0, t133, t32,
2009 Sep 30
2
[LLVMdev] long double type on ARM
...ils-7.4 package for ARM linux using LLVM 2.5 version.
When i compiled 'od' program in coreutils package using LLVM 2.5,
i could see the error message on llc processing.
> llvm-gcc -emit-llvm ./od.c -c -o ./od.bc -other-options...
> llc -march=arm ./od.bc -f -o ./od.s
llc: /home/jaykang10/HardDisk2/Projects/LLVM/src/llvm-2.5/lib/Target/TargetData.cpp:305: unsigned int llvm::TargetData::getAlignmentInfo(llvm::AlignTypeEnum, uint32_t, bool, const llvm::Type*) const: Assertion `AlignType == VECTOR_ALIGN && "Unknown alignment type!"' failed.
The problem was that
w...
2016 Jun 28
2
Question about VectorLegalizer::ExpandStore() with v4i1
On Tue, Jun 28, 2016 at 2:45 AM, jingu kang via llvm-dev
<llvm-dev at lists.llvm.org> wrote:
> Hi All,
>
> Can someone comment below question whether it is wrong or not please?
>
> 2016-06-25 7:52 GMT+01:00 jingu kang <jaykang10 at gmail.com>:
>> Hi All,
>>
>> I have a problem with VectorLegalizer::ExpandStore() with v4i1.
>>
>> Let's see a example.
>>
>> * LLVM IR
>> store <4 x i1> %edgeMask_for.body1314, <4 x i1>* %27
>>
>> * SelectionDAG befo...
2009 Sep 30
0
[LLVMdev] long double type on ARM
...;
>> When i compiled 'od' program in coreutils package using LLVM 2.5,
>> i could see the error message on llc processing.
>>
>> > llvm-gcc -emit-llvm ./od.c -c -o ./od.bc -other-options...
>> > llc -march=arm ./od.bc -f -o ./od.s
>> llc: /home/jaykang10/HardDisk2/Projects/LLVM/src/llvm-2.5/lib/
>> Target/TargetData.cpp:305: unsigned int
>> llvm::TargetData::getAlignmentInfo(llvm::AlignTypeEnum, uint32_t,
>> bool, const llvm::Type*) const: Assertion `AlignType ==
>> VECTOR_ALIGN && "Unknown alignment type...
2010 Oct 21
0
[LLVMdev] Structure memory layout
On 21 October 2010 08:26, Jin Gu Kang <jaykang10 at imrc.kist.re.kr> wrote:
> I think you misunderstood our type notation.
> By using your suggetion, "s4" means "i4 align short" in our notation.
> In "i4 align 2" for "short a:4", I think that "align 2" is already target dependent
>...
2010 Oct 21
1
[LLVMdev] Structure memory layout
I am pleased to discuss probleams with you. :)
(Your answer is really helpful to me).
If you don't mind I would often like to ask you a question.
Thanks,
Jin-Gu Kang
2011 Jan 13
0
[LLVMdev] Where is liveness analysis pass?
...o use FunctionPass instead of MachineFunctionPass.
Interestingly I found a FunctionPass example for classic liveness data flow equation.
http://cs.pub.ro/~cpl/wiki/images/1/15/Hello.txt
------------------------------------------------
--Zhanglin
----- Original Message -----
From: Jin Gu Kang <jaykang10 at imrc.kist.re.kr>
To: Zhanglin Liu <way_lzl at sina.com>
Subject: RE: [LLVMdev] Where is liveness analysis pass?
Date: 2011-1-13 16:28:59
Hi Zhanglin.
First I suggest to read http://llvm.org/docs/CodeGenerator.html#liveintervals. :)
I saw the basic processing order of Live interval in...
2012 Feb 02
1
[LLVMdev] dragonegg arm patch
Thanks for applying this patch. I really appreciate that.
Sincerely,
Jin-Gu Kang
2012 Aug 22
1
[LLVMdev] buildbot failure in LLVM on clang-native-mingw64-win7
...d Source Stamp: [branch trunk] 162350
> Blamelist: aaronballman,ahatanak,alexfh,anithab,asl,baldrick,bwilson,chandlerc,chapuni,criswell,ctopper,d0k,dblaikie,ddunbar,delesley,dgregor,djasper,dyatkovskiy,echristo,efriedma,evancheng,fjahanian,gps,gribozavr,grosbach,grosser,hanm,hans,hliao,jacksprat,jaykang10,jrose,jush,kcc,klimek,kremenek,matthewbg,mcrosier,mspencer,nadav,nicholas,panzer,pranavb,rafael,rdivacky,resistor,rjmccall,rsmith,rtrieu,spop,spyffe,stoklund,tbrethou,tnorthover,victorm,void,zaks
>
> BUILD FAILED: failed clang-test
>
> sincerely,
> -The Buildbot
>
>
>
2010 Oct 21
2
[LLVMdev] Structure memory layout
Hi Renato,
First, I appreciate your answer again. :)
>> %Char = type { c3, c4, c3, c2 }
>> %Short = type { s3, s4, s3, s2 }
>> %Int = type { i3, i4, i3, i2 }
> See, i is not for int (the C data type) but for every integer type on
> any language/platform combination. Normally, booleans are i1 and char
> i8, in ARM short is 16 and int is 32, and all of them use the
2010 Oct 20
0
[LLVMdev] Structure memory layout
On 20 October 2010 06:22, Jin Gu Kang <jaykang10 at imrc.kist.re.kr> wrote:
> The IR in an previous e-mail is incomplete so far and
> I am converting it to various shape.
Hi Jin,
No worries. I'm interested in the outcome, so I'm playing the devil's
advocate to make sure your proposal is consistent with the rest of
LLVM.
&...
2016 Feb 01
2
Question about store with unaligned memory address
Hi Bruce,
Thanks for response.
I also think it is not good way. Do you have the other ways to legalize it?
Thanks,
JinGu Kang
2016-02-01 13:11 GMT+00:00 Bruce Hoult <bruce at hoult.org>:
> In fact this is a pretty bad legalizing/lowering because you only need to
> load and edit for the first and last values in the vector. The other words
> are completely replaced and don't