search for: ivhd

...XEN) AMD-Vi: Revision 0x1 (XEN) AMD-Vi: CheckSum 0x9b (XEN) AMD-Vi: OEM_Id AMD (XEN) AMD-Vi: OEM_Table_Id RD890S (XEN) AMD-Vi: OEM_Revision 0x202031 (XEN) AMD-Vi: Creator_Id AMD (XEN) AMD-Vi: Creator_Revision 0x0 (XEN) AMD-Vi: IVRS Block: type 0x10 flags 0x3e len 0xa0 id 0x2 (XEN) AMD-Vi: IVHD Device Entry: type 0x3 id 0x0 flags 0x0 (XEN) AMD-Vi: Dev_Id Range: 0x0 -> 0x2 (XEN) AMD-Vi: IVHD Device Entry: type 0x2 id 0x10 flags 0x0 (XEN) AMD-Vi: IVHD Device Entry: type 0x3 id 0x100 flags 0x0 (XEN) AMD-Vi: Dev_Id Range: 0x100 -> 0x101 (XEN) AMD-Vi: IVHD Device Entry: type 0x2 id 0x3...

...to this list, I know that there has been a bug related to the issue described in Xen Security Advisory 36 that disables iommu for some AMD users like me. However, even when passing "iommu=no-amd-iommu-perdev-intremap" it still disables i/o virtualisatoin. Related Xen dmesg output: (XEN) IVHD Error: Invalid IO-APIC 0 (XEN) AMD-Vi: Error initialization (XEN) I/O virtualisation disabled Is there _any_ way I can fix this to make IOMMU work again? Updating my BIOS had no effect. I''m using Xen 4.4 unstable from the official git. Any help is greatly appreciated. kind regards, F. N...

Dear mailinglist, I own a Gigabyte motherboard GA 970A UD3 with IOMMU support. Since the update XSA-36 (also part of the latest debian wheezy pkg), the IO-Virtualisation does not work any more as discussed on this mailinglist [0] and [1]. I like to ask, if there is an "official" solution in sight. I''m not sure about my alternatives. How "dangerous" is the

...f[apic].bdf == bdf && + ioapic_sbdf[apic].seg == seg ) + break; + apic = find_next_bit(ioapic_cmdline, ARRAY_SIZE(ioapic_sbdf), + apic + 1); + } + + if ( apic < ARRAY_SIZE(ioapic_sbdf) ) + { + AMD_IOMMU_DEBUG("IVHD: Command line override present for IO-APIC %#x " + "(IVRS: %#x devID %04x:%02x:%02x.%u)\n", + apic, handle, seg, PCI_BUS(bdf), + PCI_SLOT(bdf), PCI_FUNC(bdf)); + ret = 1; + } + + return ret; +} + stati...

For one we shouldn''t accept IVHD tables specifying IO-APIC IDs beyond the limit we support (MAX_IO_APICS, currently 128). And then we shouldn''t memset() a pointer allocation of which failed. Signed-off-by: Jan Beulich <jbeulich@suse.com> --- a/xen/drivers/passthrough/amd/iommu_acpi.c +++ b/xen/drivers/passthrough...

...side interrupts are getting to the CPUs. However, given that very few devices have MSI interrupts enabled by the BIOS, it may be a little more of an issue. It seems there are two fixes available, which would be nice to see from the BIOS vendor: 1) "the bandaid" - just remove the second IVHD IOAPIC entry. Then, Xen will do interrupt remapping at least for the SB IOAPIC. I modified the Xen source to ignore this second entry, and get the dmesg shown below. My system seems to run fine after the change. 2) Properly configure the NB IOMMU, even if just as set out in 6.4.1. http://review...

...insertions(+), 18 deletions(-) diff --git a/xen/drivers/passthrough/amd/iommu_acpi.c b/xen/drivers/passthrough/amd/iommu_acpi.c index 89b359c..8b14112 100644 --- a/xen/drivers/passthrough/amd/iommu_acpi.c +++ b/xen/drivers/passthrough/amd/iommu_acpi.c @@ -698,14 +698,16 @@ static u16 __init parse_ivhd_device_special( return 0; } - AMD_IOMMU_DEBUG("IVHD Special: %04x:%02x:%02x.%u variety %#x handle %#x\n", + AMD_IOMMU_DEBUG("IVHD Special: %04x:%02x:%02x.%u variety %#x handle %#x used_id %#x\n", seg, PCI_BUS(bdf), PCI_SLOT(bdf), PCI_FU...

Hey I wanted to try my hand at doing some GPU passthrough so on my ASUS M5A97 which in the pass worked with an older BIOS (but said BIOS had issues after S3 suspend) - but with a BIOS the PCI passthrough does not work. That is due to:: (XEN) IVHD Error: Invalid IO-APIC 0xff (XEN) AMD-Vi: Error initialization (XEN) I/O virtualisation disabled A bit of Googling and I add in "no-amd-iommu-perdev-intremap,no-intremap" That combination looks to b...

...(XEN) AMD-Vi: Revision 0x1 (XEN) AMD-Vi: CheckSum 0x40 (XEN) AMD-Vi: OEM_Id AMD (XEN) AMD-Vi: OEM_Table_Id RD890S (XEN) AMD-Vi: OEM_Revision 0x202031 (XEN) AMD-Vi: Creator_Id AMD (XEN) AMD-Vi: Creator_Revision 0 (XEN) AMD-Vi: IVRS Block: type 0x10 flags 0x3e len 0xa0 id 0x2 (XEN) AMD-Vi: IVHD Device Entry: type 0x3 id 0 flags 0 (XEN) AMD-Vi: Dev_Id Range: 0 -> 0x2 (XEN) AMD-Vi: IVHD Device Entry: type 0x2 id 0x10 flags 0 (XEN) AMD-Vi: IVHD Device Entry: type 0x3 id 0x100 flags 0 (XEN) AMD-Vi: Dev_Id Range: 0x100 -> 0x101 (XEN) AMD-Vi: IVHD Device Entry: type 0x2 id 0x20 flags 0...

Hi Konrad, Today i tried linuses tree of today (last commit is 4c4d285ad5665bfbd983b95fde8d7a477d24a361). It boots dom0 fine, but it fails to start any domU with: "Error: Failed to query current memory allocation of dom0." With my previous 3.1.5 kernel everything is fine, nothing else changed in config in between. dmesg and xm dmesg attached -- Sander Dom0 shows: total

Hi, unfortunatly your latest change "AMD,IOMMU: Clean up old entries in remapping tables when creating new one" (Changeset 26517 in xen-unstable and 25975 in xen-4.2-testing) is causing a CPU0 Panic at boot for me. When i tried to boot latest versions of xen unstable or xen-testing, my dom0 gives me the message: (XEN) ************************************* (XEN) Panic on CPU 0: (XEN)

Hi Jan, After commit 2ca9fbd739b8a72b16dd790d0fff7b75f5488fb8 AMD IOMMU: allocate IRTE entries instead of using a static mapping, booting dom0 stalls several times. Sometimes this results in RCU stall warnings from the dom0 kernel, hitting the "any" key, on normal or serial console, makes the boot continue for a while but it stalls several times. (It also stalls on shutdown BTW) I have

...mware interfaces and drivers. They need to describe relationship between IOMMU and endpoint, and DT or ACPI IORT don't expect the programming interface to be inside the PCI bus that the IOMMU manages. Describing it as a peripheral is more natural. For AMD it is implemented in their driver using IVHD tables that can't be reused. Right now I don't expect any success in proposing changes to firmware interfaces or drivers, because the device is new and paravirtualized, and works out of the box with MMIO. Hopefully that will change in the future, perhaps when someone supports DT for AMD IOM...

...mware interfaces and drivers. They need to describe relationship between IOMMU and endpoint, and DT or ACPI IORT don't expect the programming interface to be inside the PCI bus that the IOMMU manages. Describing it as a peripheral is more natural. For AMD it is implemented in their driver using IVHD tables that can't be reused. Right now I don't expect any success in proposing changes to firmware interfaces or drivers, because the device is new and paravirtualized, and works out of the box with MMIO. Hopefully that will change in the future, perhaps when someone supports DT for AMD IOM...

On Fri, 2013-07-05 at 18:33 +0400, darkshvein l wrote: > http://pastebin.com/UFDUpW7r > >XEN) IVHD Error: Conflicting IO-APIC 0x8 entries This rings a bell, although I don't recall the specifics. I suggest you google for it. It's probably also worth ensuring you have the very latest firmware (BIOS) for your system, since ISTR it involves the BIOS provided tables being invalid. If al...

Hi. Package: xen-hypervisor-4.1-amd64 Starting guest VM, after package upgrade: xm create winxp Using config file "./winxp". Error: failed to assign device: maybe the platform doesn't support VT-d, or VT-d isn't enabled properly? If I set up VM properly after few months, but I remember, I met same error only after package upgrade. Pastebin logs, for check my errors: xm info

...> regardless of the underlying architecture. It isn't defined solely for the > ARM SMMU, but serves a more general purpose of describing a map of > device > identifiers communicated from one components to another. Both DMAR and > IVRS have such description (respectively DRHD and IVHD), but they are > designed for a specific IOMMU, whereas IORT could host other kinds. I'll take a look at IORT definition. DRHD includes information more than device mapping. > > It seems that all we really need is an interface that says "there is a > virtio-iommu at address...

...> regardless of the underlying architecture. It isn't defined solely for the > ARM SMMU, but serves a more general purpose of describing a map of > device > identifiers communicated from one components to another. Both DMAR and > IVRS have such description (respectively DRHD and IVHD), but they are > designed for a specific IOMMU, whereas IORT could host other kinds. I'll take a look at IORT definition. DRHD includes information more than device mapping. > > It seems that all we really need is an interface that says "there is a > virtio-iommu at address...

> From: Jean-Philippe Brucker > Sent: Saturday, April 8, 2017 3:18 AM > > Unlike other virtio devices, the virtio-iommu doesn't work independently, > it is linked to other virtual or assigned devices. So before jumping into > device operations, we need to define a way for the guest to discover the > virtual IOMMU and the devices it translates. > > The host must

> From: Jean-Philippe Brucker > Sent: Saturday, April 8, 2017 3:18 AM > > Unlike other virtio devices, the virtio-iommu doesn't work independently, > it is linked to other virtual or assigned devices. So before jumping into > device operations, we need to define a way for the guest to discover the > virtual IOMMU and the devices it translates. > > The host must