search for: ivanllopard

Displaying 20 results from an estimated 113 matches for "ivanllopard".

2012 May 08
0
[LLVMdev] Address space information dropped
On Tue, May 8, 2012 at 4:59 AM, Ivan Llopard <ivanllopard at gmail.com> wrote: > Hi Eli, > > > On 07/05/2012 18:15, Eli Friedman wrote: >> >> On Mon, May 7, 2012 at 5:15 AM, Ivan Llopard<ivanllopard at gmail.com> >>  wrote: >>> >>> Hi all, >>> >>> Tuning my TargetAsmPrinter impleme...
2012 May 08
4
[LLVMdev] Address space information dropped
Hi Eli, On 07/05/2012 18:15, Eli Friedman wrote: > On Mon, May 7, 2012 at 5:15 AM, Ivan Llopard<ivanllopard at gmail.com> wrote: >> Hi all, >> >> Tuning my TargetAsmPrinter implementation in the back-end side, I >> discovered that the address space number is not passed down while >> emitting global variables with constant initializers. The information is >> dropped...
2012 Mar 23
2
[LLVMdev] Fixing VAARG on PPC64
On Fri, 23 Mar 2012 09:50:12 +0100 Ivan Llopard <ivanllopard at gmail.com> wrote: > Hi Finkel, > > Le 23/03/2012 05:50, Hal Finkel a écrit : > > The PowerPC backend on PPC64 for non-Darwin (SVR4 ABI) systems > > currently has a problem handling integer types smaller than 64 bits. > > This is because the ABI specifies that thes...
2011 Dec 10
1
[LLVMdev] Types inference in tblgen: Multiple exceptions
On 10/12/2011 01:32, Eli Friedman wrote: > On Fri, Dec 9, 2011 at 4:12 PM, Ivan Llopard<ivanllopard at gmail.com> wrote: >> Hi Eli, >> Thanks for your response. Please see my responses below. >> >> >> On 10/12/2011 00:28, Eli Friedman wrote: >>> On Fri, Dec 9, 2011 at 4:46 AM, Llopard Ivan<ivanllopard at gmail.com> >>> wrote: >>&gt...
2012 Mar 23
0
[LLVMdev] Fixing VAARG on PPC64
Le 23/03/2012 17:02, Hal Finkel a écrit : > On Fri, 23 Mar 2012 09:50:12 +0100 > Ivan Llopard<ivanllopard at gmail.com> wrote: > >> Hi Finkel, >> >> Le 23/03/2012 05:50, Hal Finkel a écrit : >>> The PowerPC backend on PPC64 for non-Darwin (SVR4 ABI) systems >>> currently has a problem handling integer types smaller than 64 bits. >>> This is because th...
2011 Dec 10
0
[LLVMdev] Types inference in tblgen: Multiple exceptions
On Fri, Dec 9, 2011 at 4:12 PM, Ivan Llopard <ivanllopard at gmail.com> wrote: > Hi Eli, > Thanks for your response. Please see my responses below. > > > On 10/12/2011 00:28, Eli Friedman wrote: >> >> On Fri, Dec 9, 2011 at 4:46 AM, Llopard Ivan<ivanllopard at gmail.com> >>  wrote: >>> >>> Hi all...
2011 Dec 10
5
[LLVMdev] Types inference in tblgen: Multiple exceptions
Hi Eli, Thanks for your response. Please see my responses below. On 10/12/2011 00:28, Eli Friedman wrote: > On Fri, Dec 9, 2011 at 4:46 AM, Llopard Ivan<ivanllopard at gmail.com> wrote: >> Hi all, >> >> I am writing a back-end for a processor that has complex type registers. >> It has two functional units to perform complex multiplications. >> From clang, I emulate a complex multiplication using vectors and, at >> the...
2012 Mar 07
2
[LLVMdev] Data/Address registers
Hi Jim, Thanks for your response. Le 06/03/2012 22:54, Jim Grosbach a écrit : > Hi Ivan, > On Mar 3, 2012, at 4:48 AM, Ivan Llopard<ivanllopard at gmail.com> wrote: > >> Hi, >> >> I'm facing a problem in llvm while porting it to a new target and I'll >> need some support. >> We have 2 kind of register, one for general purposes (i.e. arithmetic, >> comparisons, etc.) and the other for memor...
2012 May 29
2
[LLVMdev] [PATCH] handleMoveIntoBundle assertion
Hi Ivan, I'm just looking into it now. Thanks for working on this. - Lang. On Tue, May 29, 2012 at 6:50 AM, Ivan Llopard <ivanllopard at gmail.com> wrote: > Hi again, > > Just forgot to add PATCH prefix to my message! Could you please review it ? > > Ivan > > Le 26/05/2012 00:52, Ivan Llopard a écrit : > > Hi, > > > > I have a custom scheduler/bundler running just after coalescing as &gt...
2012 Mar 07
0
[LLVMdev] Data/Address registers
On Mar 7, 2012, at 6:23 AM, Ivan Llopard <ivanllopard at gmail.com> wrote: > Hi Jim, > > Thanks for your response. > > Le 06/03/2012 22:54, Jim Grosbach a écrit : >> Hi Ivan, >> On Mar 3, 2012, at 4:48 AM, Ivan Llopard<ivanllopard at gmail.com> wrote: >> >>> Hi, >>> >>> I'm...
2012 Jun 06
0
[LLVMdev] Instruction bundles before RA: Rematerialization
On Jun 6, 2012, at 2:53 AM, Ivan Llopard <ivanllopard at gmail.com> wrote: > We have a new BE for a VLIW-like processor and I'm currently working on > instruction bundles. Ideally, I'd like to have bundles *before* RA to > model certain constraints, e.g. the exposed one by Tzu-Chien a while ago > in his thread > http://l...
2012 May 23
2
[LLVMdev] Predicate registers/condition codes question
Hi Ivan, On Tue, May 22, 2012 at 5:09 PM, Ivan Llopard <ivanllopard at gmail.com> wrote: > Hi Sebastian, > > On 22/05/2012 23:25, Sebastian Pop wrote: >> So my question is how do we specify that for most of the operations i8 >> should be promoted to i32 and that only a few logical operations are >> legal on i8? > > I think the co...
2012 Feb 08
2
[LLVMdev] Fixed-point arithmetic
Hi all, Is there any ongoing work in LLVM/Clang to support fixed-point arithmetic as described in ISO/IEC TR 18037 ? It seems that gcc has support for it since 2007 and it would be useful for us to add such support. Just to get an idea if we decide to work on this, how long would it take to get it implemented ? Regards, Ivan
2012 Mar 14
2
[LLVMdev] Lowering formal pointer arguments
Hi, How can I get the llvm-type of the formal argument while lowering it ? My target needs to map pointer and non-pointer parameters to different registers. In addition, parameter lowering is address space dependent (another reason why I need such information). Looking at the DAGBuilder, I found that it is dropping it when translating llvm-types to BE types. Even if the base type is saved
2012 Mar 15
0
[LLVMdev] Lowering formal pointer arguments
If you need llvm::Argument, this returns the iterator pointing to the first argument: Function::const_arg_iterator Arg = DAG.getMachineFunction().getFunction()->arg_begin(); On Wed, Mar 14, 2012 at 8:16 AM, Ivan Llopard <ivanllopard at gmail.com> wrote: > Hi, > > How can I get the llvm-type of the formal argument while lowering it ? > > My target needs to map pointer and non-pointer parameters to different > registers. In addition, parameter lowering is address space dependent > (another reason why I ne...
2012 Mar 28
0
[LLVMdev] Remove subreg copies
On Mar 28, 2012, at 7:41 AM, Ivan Llopard <ivanllopard at gmail.com> wrote: > Hi, > > I'm facing a problem in my BE while trying to remove certain copies. > Here is a code snippet which I would like to optimize > > %vreg1<def> = READF32r; vRRegs:%vreg1 > %vreg2<def> = COPY %vreg1:rsub_h; iRSubRegs:%vreg2 vRRe...
2012 May 07
0
[LLVMdev] Address space information dropped
On Mon, May 7, 2012 at 5:15 AM, Ivan Llopard <ivanllopard at gmail.com> wrote: > Hi all, > > Tuning my TargetAsmPrinter implementation in the back-end side, I > discovered that the address space number is not passed down while > emitting global variables with constant initializers. The information is > dropped at AsmPrinter::EmitGloba...
2012 May 09
1
[LLVMdev] Address space information dropped
Le 08/05/2012 20:44, Eli Friedman a écrit : > On Tue, May 8, 2012 at 4:59 AM, Ivan Llopard<ivanllopard at gmail.com> wrote: >> Hi Eli, >> >> >> On 07/05/2012 18:15, Eli Friedman wrote: >>> On Mon, May 7, 2012 at 5:15 AM, Ivan Llopard<ivanllopard at gmail.com> >>> wrote: >>>> Hi all, >>>> >>>> Tuning my TargetAs...
2012 Feb 08
0
[LLVMdev] Fixed-point arithmetic
On Wed, Feb 8, 2012 at 3:39 AM, Ivan Llopard <ivanllopard at gmail.com> wrote: > Hi all, > > Is there any ongoing work in LLVM/Clang to support fixed-point > arithmetic as described in ISO/IEC TR 18037 ? No. > It seems that gcc has support for it since 2007 and it would be useful > for us to add such support. > Just to get an ide...
2012 Mar 28
2
[LLVMdev] Remove subreg copies
Hi, I'm facing a problem in my BE while trying to remove certain copies. Here is a code snippet which I would like to optimize %vreg1<def> = READF32r; vRRegs:%vreg1 %vreg2<def> = COPY %vreg1:rsub_h; iRSubRegs:%vreg2 vRRegs:%vreg1 %vreg3<def> = COPY %vreg1:rsub_l; iRSubRegs:%vreg3 vRRegs:%vreg1 This code produces subreg-to-subreg copies but I would like to have direct