search for: isvolatil

...I); } @@ -470,9 +614,13 @@ void setCurrentBasicBlock(MachineBasicBlock *MBB) { CurMBB = MBB; } SDOperand getLoadFrom(const Type *Ty, SDOperand Ptr, - const Value *SV, SDOperand Root, + const Value *PtrV, int Offset, bool isVolatile); + void getStoreTo(SDOperand Src, const Value *SrcV, + SDOperand Ptr, const Value *PtrV, + int Offset, bool isVolatile); + SDOperand getIntPtrConstant(uint64_t Val) { return DAG.getConstant(Val, TLI.getPointerTy()); } @@ -1814,28 +1962,28 @@ void S...

...> a default argument helping to hide it. > > Can you be more specific about what the bugs are? Sure. SelectionDAG::getStore and getLoad are declared like this: SDOperand getLoad(MVT::ValueType VT, SDOperand Chain, SDOperand Ptr, const Value *SV, int SVOffset, bool isVolatile=false); SDOperand getStore(SDOperand Chain, SDOperand Val, SDOperand Ptr, const Value *SV, int SVOffset, bool isVolatile=false); In SelectionDAGISel.cpp in SelectionDAGLowering::getLoadFrom and SelectionDAGLowering::visitStore they are called like this: L = DAG.getLo...

...to make sure that the non-temporal > flag is significant. It's not fundamentally different from the > volatile flag in this respect. Ok, this sounds right, but this look wrong: /// Abstact virtual class for operations for memory operations class MemSDNode : public SDNode { [...] bool isVolatile() const { return (SubclassData >> 5) & 1; } Shouldn't that be MMO->isVolatile()? -Dave

...>isUnindexed()) { unsigned Align = ST->getAlignment(); MVT SVT = Value.getOperand(0).getValueType(); unsigned OrigAlign = TLI.getTargetData()-> getABITypeAlignment(SVT.getTypeForMVT()); if (Align <= OrigAlign && ((!LegalOperations && !ST->isVolatile()) || TLI.isOperationLegalOrCustom(ISD::STORE, SVT))) return DAG.getStore(Chain, N->getDebugLoc(), Value.getOperand(0), Ptr, ST->getSrcValue(), ST->getSrcValueOffset(), ST->isVolatile(), OrigAlign); } Uhh...this doe...

Hi Evan, > LValue LV = EmitLV(lhs); > bool isVolatile = TREE_THIS_VOLATILE(lhs); > unsigned Alignment = expr_align(exp) / 8 > > It's using the alignment of the expression, rather than the memory > object of LValue. can't you just use expr_align(lhs) instead? > The patch saves the alignment of the memory object in LValue...

On Nov 6, 2007, at 5:45 PM, Bill Wendling wrote: > Hi all, > > This patch is to fix a problem on PPC64 where an unaligned memcpy is > generated. The testcase is this: > > $ cat testcase.c > void Qux() { > char Bar[11] = {0}; > } > > What happens is that we produce LLVM code like this: > > call void @llvm.memcpy.i64( i8* %event_list2, i8* getelementptr ([11

...unsigned SrcAlign) { // If this is an SSA value, don't emit a load, just use the result. if (isGCC_SSA_Temporary(exp)) { assert(DECL_LLVM_SET_P(exp) && "Definition not found before use!"); @@ -2540,7 +2541,7 @@ LValue LV = EmitLV(exp); bool isVolatile = TREE_THIS_VOLATILE(exp); const Type *Ty = ConvertType(TREE_TYPE(exp)); - unsigned Alignment = expr_align(exp) / 8; + unsigned DstAlign = expr_align(exp) / 8; if (!LV.isBitfield()) { if (!DestLoc) { @@ -2548,17 +2549,17 @@ Value *Ptr = CastToType(Instruction::BitCast, LV....

On Feb 11, 2010, at 12:07 PM, David Greene wrote: > On Thursday 11 February 2010 14:02:13 Dan Gohman wrote: > >>>> Putting a bit (or multiple bits) in MachineMemOperand for this >>>> would also make sense. >>> >>> Is there any chance a MachineMemOperand will be shared by multiple >>> instructions? >> >> Yes. > > Then

On Dec 19, 2006, at 12:13 PM, Dan Gohman wrote: > Hello, > > I did a little experiment modifying LLVM to be able to use alias- > analysis > information in scheduling so that independent memory operations may be > reordered. I am not sure if it is a good idea to do this at scheduling time. LLVM explicitly models control flows dependencies as chain operands. This eliminated

...TableGen patterns to properly select movnt). In our tree we simply added another flag to the MemSDNode constructor and embedded it in SubclassData: MemSDNode(unsigned Opc, DebugLoc dl, SDVTList VTs, MVT MemoryVT, const Value *srcValue, int SVOff, unsigned alignment, bool isvolatile, bool NonTemporal); This is ugly for a variety of reasons and also doesn't scale as we want to add more of this kind of information. So what if we replace Volatile/NonTemporal with a single bitvector? There's not a lot of room in SubclassData (it also holds alignment information) so may...

...t; flag is significant. It's not fundamentally different from the >> volatile flag in this respect. > > Ok, this sounds right, but this look wrong: > > /// Abstact virtual class for operations for memory operations > class MemSDNode : public SDNode { > [...] > bool isVolatile() const { return (SubclassData >> 5) & 1; } > > Shouldn't that be MMO->isVolatile()? It's not a bug; the code could be written either way. There's actually an assert in MemSDNode's constructor which checks that they're the same. I believe the code is struc...

...%6 = load i64* %key_token2_addr, align 8 ; <i64> [#uses=1] store i64 %6, i64* %5, align 8 ... The store alignment 8 is wrong. The address iospec has 4-byte alignment. The problem is llvm-gcc TreeToLLVM::EmitMODIFY_EXPR: LValue LV = EmitLV(lhs); bool isVolatile = TREE_THIS_VOLATILE(lhs); unsigned Alignment = expr_align(exp) / 8 It's using the alignment of the expression, rather than the memory object of LValue. The patch saves the alignment of the memory object in LValue returned by EmitLV(). Please review it carefully as I am not entirely...

...te: > On Wednesday 10 February 2010 12:58:25 Chris Lattner wrote: > >> I think that adding a bit to LoadSDNode and StoreSDNode would make sense. > > Ok. The consequence is that a number of functions will have to change to > propagate this bit, analogous to what happens with isVolatile. It's > essentially what we do right now here. If everyone's ok with that, I'll go > that route. Putting a bit (or multiple bits) in MachineMemOperand for this would also make sense. Dan

...Alignment(); MVT SVT = Value.getOperand(0).getValueType(); - unsigned OrigAlign = TLI.getTargetData()-> + unsigned Align = TLI.getTargetData()-> getABITypeAlignment(SVT.getTypeForMVT()); if (Align <= OrigAlign && ((!LegalOperations && !ST->isVolatile()) || Does that look right to you? Dan On Wed, February 18, 2009 4:49 pm, David Greene wrote: > I got bit by this in LLVM 2.4 DagCombiner.cpp and it's still in trunk: > > SDValue DAGCombiner::visitSTORE(SDNode *N) { > > [...] > > // If this is a store of a bit convert...

Hi all, This patch is to fix a problem on PPC64 where an unaligned memcpy is generated. The testcase is this: $ cat testcase.c void Qux() { char Bar[11] = {0}; } What happens is that we produce LLVM code like this: call void @llvm.memcpy.i64( i8* %event_list2, i8* getelementptr ([11 x i8]* @C.103.30698, i32 0, i32 0), i64 11, i32 8 ) Notice that it has an 8-byte alignment. However, the Bar

While hacking around in the SelectionDAG build code, I've made the isVolatile, (new) isNonTemporal and Alignment parameters to SelectionDAG::getLoad/getStore and friends non-default. I've already caught one bug in the XCore backend by doing this: if (Offset % 4 == 0) { // We've managed to infer better alignment information than the load // already...

...ebruary 2010 12:58:25 Chris Lattner wrote: > >> I think that adding a bit to LoadSDNode and StoreSDNode would make > >> sense. > > > > Ok. The consequence is that a number of functions will have to change to > > propagate this bit, analogous to what happens with isVolatile. It's > > essentially what we do right now here. If everyone's ok with that, I'll > > go that route. > > Putting a bit (or multiple bits) in MachineMemOperand for this > would also make sense. Is there any chance a MachineMemOperand will be shared by multiple i...

...mpleTy) { default: llvm_unreachable("Unknown FP type"); case MVT::f80: // We don't do this for these yet. case MVT::f128: case MVT::ppcf128: break; case MVT::f32: if ((isTypeLegal(MVT::i32) && !LegalOperations && !ST->isVolatile()) || TLI.isOperationLegalOrCustom(ISD::STORE, MVT::i32)) { Tmp = DAG.getConstant((uint32_t)CFP->getValueAPF(). bitcastToAPInt().getZExtValue(), MVT::i32); return DAG.getStore(Chain, N->getDebugLoc(), Tmp,...

...dex: gcc/llvm-convert.cpp =================================================================== --- gcc/llvm-convert.cpp (revision 43366) +++ gcc/llvm-convert.cpp (working copy) @@ -3020,8 +3020,26 @@ Emit(TREE_OPERAND(exp, 1), LV.Ptr); EmitAggregateCopy(DestLoc, LV.Ptr, TREE_TYPE(exp), isVolatile, false, Alignment); } else if (!isVolatile && TREE_CODE(TREE_OPERAND(exp, 0))!=RESULT_DECL) { - Emit(TREE_OPERAND(exp, 1), LV.Ptr); + // At this point, Alignment is the alignment of the destination + // pointer. It may not match the alignment of...

...++argI) + if (CS.getArgument(argI)->stripPointerCasts() == pointer) + break; + + if (argI == CS.arg_size()) + return false; per http://llvm.org/docs/CodingStandards.html#hl_predicateloops + // Store cannot be volatile (case 2) and must-alias with our pointer. + if (S->isVolatile()) { + return false; + } else { no need for the 'else after return': http://llvm.org/docs/CodingStandards.html#hl_else_after_return + AliasAnalysis& AA = getAnalysis<AliasAnalysis>(); + if (AA.alias(S->getPointerOperand(), 1, pointer, 1) != + AliasAnalysi...