Displaying 4 results from an estimated 4 matches for "isunpcklmask".
2011 Feb 25
2
[LLVMdev] X86 LowerVECTOR_SHUFFLE Question
In ToT, LowerVECTOR_SHUFFLE for x86 has this code:
if (X86::isUNPCKLMask(SVOp))
getTargetShuffleNode(getUNPCKLOpcode(VT) dl, VT, V1, V2, DAG);
why would this not be:
if (X86::isUNPCKLMask(SVOp))
return SVOp;
I'm trying to add support for VUNPCKL and am getting into trouble
because the existing code ends up creating:
VUNPCKLPS
load
load
which is ba...
2011 Feb 26
0
[LLVMdev] X86 LowerVECTOR_SHUFFLE Question
David Greene <dag at cray.com> writes:
> In ToT, LowerVECTOR_SHUFFLE for x86 has this code:
>
> if (X86::isUNPCKLMask(SVOp))
> getTargetShuffleNode(getUNPCKLOpcode(VT) dl, VT, V1, V2, DAG);
>
> why would this not be:
>
> if (X86::isUNPCKLMask(SVOp))
> return SVOp;
Ok, I discovered that Bruno did this in revisions 112934, 112942 and
113020 but the logs don't really make clear why....
2006 Mar 28
1
[LLVMdev] CVS broken in X86ISelLowering.cpp.
...retrieving revision 1.139
diff -a -u -r1.139 X86ISelLowering.cpp
--- X86ISelLowering.cpp 28 Mar 2006 08:27:15 -0000 1.139
+++ X86ISelLowering.cpp 28 Mar 2006 08:47:58 -0000
@@ -2609,5 +2609,5 @@
X86::isPSHUFDMask(Mask.Val) ||
X86::isSHUFPMask(Mask.Val) ||
X86::isUNPCKLMask(Mask.Val) ||
- X86::isUNPCKHMask(Mask.Val);
+ X86::isUNPCKHMask(Mask.Val));
}
cheers
Ramana
2011 Feb 26
2
[LLVMdev] X86 LowerVECTOR_SHUFFLE Question
...DAG nodes, we avoid that possibility and also make it much easier to match the shuffles during isel.
On Feb 25, 2011, at 6:01 PM, David A. Greene wrote:
> David Greene <dag at cray.com> writes:
>
>> In ToT, LowerVECTOR_SHUFFLE for x86 has this code:
>>
>> if (X86::isUNPCKLMask(SVOp))
>> getTargetShuffleNode(getUNPCKLOpcode(VT) dl, VT, V1, V2, DAG);
>>
>> why would this not be:
>>
>> if (X86::isUNPCKLMask(SVOp))
>> return SVOp;
>
> Ok, I discovered that Bruno did this in revisions 112934, 112942 and
> 113020 but the l...