Displaying 7 results from an estimated 7 matches for "isunindex".
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isunindexed
2009 Feb 19
3
[LLVMdev] Possible DAGCombiner or TargetData Bug
...lue DAGCombiner::visitSTORE(SDNode *N) {
[...]
// If this is a store of a bit convert, store the input value if the
// resultant store does not need a higher alignment than the original.
if (Value.getOpcode() == ISD::BIT_CONVERT && !ST->isTruncatingStore() &&
ST->isUnindexed()) {
unsigned Align = ST->getAlignment();
MVT SVT = Value.getOperand(0).getValueType();
unsigned OrigAlign = TLI.getTargetData()->
getABITypeAlignment(SVT.getTypeForMVT());
if (Align <= OrigAlign &&
((!LegalOperations && !ST->isVolatile())...
2009 Feb 19
0
[LLVMdev] Possible DAGCombiner or TargetData Bug
...G/DAGCombiner.cpp (revision 65000)
+++ lib/CodeGen/SelectionDAG/DAGCombiner.cpp (working copy)
@@ -4903,9 +4903,9 @@
// resultant store does not need a higher alignment than the original.
if (Value.getOpcode() == ISD::BIT_CONVERT && !ST->isTruncatingStore() &&
ST->isUnindexed()) {
- unsigned Align = ST->getAlignment();
+ unsigned OrigAlign = ST->getAlignment();
MVT SVT = Value.getOperand(0).getValueType();
- unsigned OrigAlign = TLI.getTargetData()->
+ unsigned Align = TLI.getTargetData()->
getABITypeAlignment(SVT.getTypeForMVT());...
2009 Feb 20
2
[LLVMdev] Possible DAGCombiner or TargetData Bug
...on 65000)
> +++ lib/CodeGen/SelectionDAG/DAGCombiner.cpp (working copy)
> @@ -4903,9 +4903,9 @@
> // resultant store does not need a higher alignment than the original.
> if (Value.getOpcode() == ISD::BIT_CONVERT && !ST->isTruncatingStore() &&
> ST->isUnindexed()) {
> - unsigned Align = ST->getAlignment();
> + unsigned OrigAlign = ST->getAlignment();
> MVT SVT = Value.getOperand(0).getValueType();
> - unsigned OrigAlign = TLI.getTargetData()->
> + unsigned Align = TLI.getTargetData()->
> getABITypeAl...
2009 Feb 20
0
[LLVMdev] Possible DAGCombiner or TargetData Bug
...ctionDAG/DAGCombiner.cpp (working copy)
>> @@ -4903,9 +4903,9 @@
>> // resultant store does not need a higher alignment than the
>> original.
>> if (Value.getOpcode() == ISD::BIT_CONVERT && !ST-
>> >isTruncatingStore() &&
>> ST->isUnindexed()) {
>> - unsigned Align = ST->getAlignment();
>> + unsigned OrigAlign = ST->getAlignment();
>> MVT SVT = Value.getOperand(0).getValueType();
>> - unsigned OrigAlign = TLI.getTargetData()->
>> + unsigned Align = TLI.getTargetData()->
>&...
2009 May 21
0
[LLVMdev] [PATCH] Add new phase to legalization to handle vector operations
On Wed, May 20, 2009 at 4:55 PM, Dan Gohman <gohman at apple.com> wrote:
> Can you explain why you chose the approach of using a new pass?
> I pictured removing LegalizeDAG's type legalization code would
> mostly consist of finding all the places that use TLI.getTypeAction
> and just deleting code for handling its Expand and Promote. Are you
> anticipating something more
2009 May 20
2
[LLVMdev] [PATCH] Add new phase to legalization to handle vector operations
On May 20, 2009, at 1:34 PM, Eli Friedman wrote:
> On Wed, May 20, 2009 at 1:19 PM, Eli Friedman
> <eli.friedman at gmail.com> wrote:
>
>> Per subject, this patch adding an additional pass to handle vector
>>
>> operations; the idea is that this allows removing the code from
>>
>> LegalizeDAG that handles illegal types, which should be a significant
2009 May 21
2
[LLVMdev] [PATCH] Add new phase to legalization to handle vector operations
...::LoadExtType ExtType = LD->getExtensionType();
- const Value *SV = LD->getSrcValue();
- int SVOffset = LD->getSrcValueOffset();
- MVT MemoryVT = LD->getMemoryVT();
- unsigned Alignment = LD->getAlignment();
- bool isVolatile = LD->isVolatile();
-
- assert(LD->isUnindexed() && "Indexed vector loads are not supported yet!");
- SDValue Offset = DAG.getUNDEF(Ptr.getValueType());
-
- MVT MemNewEltVT = MemoryVT.getVectorElementType();
- MVT MemNewVT_Lo = MVT::getVectorVT(MemNewEltVT, NewNumElts_Lo);
- MVT MemNewVT_Hi = MVT::getVectorVT(Mem...