search for: isundef

...e <undef> flag is set. /// /// This refers to reading the register value from before the current /// instruction or bundle. Internal bundle reads are not included. bool readsReg() const { assert(isReg() && "Wrong MachineOperand accessor"); return !isUndef() && !isInternalRead() && (isUse() || getSubReg()); } I don't get why we automatically should get an implicit use just because we are writing a subreg. Since Reg5:lo16 is defined with Reg5:lo16<def> = Reg1 isUndef() will return false and getSubReg() true...

The isKill must be correct if present, but a vreg may still be killed even if the operand has no Kill flag. The isDead and isUndef flags however are required to be correct. We need further details to say anything about your problem, a LiveIntervals::dump() dump for example would be helpful to assess whether the liveness data is correct in your case. - Matthias > On Jul 28, 2016, at 1:42 PM, Krzysztof Parzyszek via llvm-de...

...bout the value of hi16 at the definition of Reg5:lo16. > This is true, but after this definition we do care about hi16 and I am > afraid read-undef does not convey the right information for the > subsequent uses of Reg5. > > You can give it a try and see how it goes. I tried setting isUndef to trie when handling INSERT_SUBREG in TwoAddressInstructioPass.cpp, but then I run into stuff like this instead: 832B %vreg50:hi16<def,read-undef> = COPY %vreg0 848B ... 864B %vreg19<def,dead> = COPY %vreg50 880B %vreg19:lo16<def,read-un...

On 7/28/2016 3:49 PM, Matthias Braun wrote: > > The isDead and isUndef flags however are required to be correct. Undef yes, but what relies on isDead being accurate (before live interval computation)? -Krzysztof -- Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum, hosted by The Linux Foundation

> On Jul 28, 2016, at 1:52 PM, Krzysztof Parzyszek <kparzysz at codeaurora.org> wrote: > > On 7/28/2016 3:49 PM, Matthias Braun wrote: >> >> The isDead and isUndef flags however are required to be correct. > > Undef yes, but what relies on isDead being accurate (before live interval computation)? I only remember Andy/Quentin making those conservative correctness claims about the kill flags but not the dead/undef flags. I am also pretty sure the Registe...

Hi, This question relates to the undef flag in the context of sub-register def operands. 1) Firstly, the documentation (comments in the source code) says that in a sub-register def operand, the "IsUndef" flag refers to the part of the register that is not written. 2) Further, the documentation about readsReg() states that a sub-register def implicitly reads the other parts of the register being redefined unless the <undef> flag is set. Now, I am writing a pass the splits the following...

...SmallVector<int, 16> RepeatedMask; bool Is128BitLaneRepeatedShuffle = is128BitLaneRepeatedShuffleMask(MVT::v64i32, Mask, RepeatedMask); if (Is128BitLaneRepeatedShuffle) { // assert(RepeatedMask.size() == 16 && "Unexpected repeated mask size!"); if (V2.isUndef()) { return DAG.getNode(X86ISD::PSHUFD_P64, DL, MVT::v64i32, V1, getV16X86ShuffleImm64ForMask(/*Repeated*/Mask, DL, DAG)); } // Use dedicated unpack instructions for masks that match their pattern. if (SDValue V = lowerVectorShuffleWithUNPCK(DL,...

...he register clearly has a different value at the new location. Reserved registers without any defs anywhere in the function are treated as ambient registers that can be read anywhere. These registers don't get a LiveInterval, and are skipped here: // Reserved registers are OK. if (MO.isUndef() || !lis.hasInterval(MO.getReg())) continue; Reserved registers with defs get LiveIntervals, and are value-checked just like virtual registers. Also note that unreserved, unallocatable registers exist. For example the ARM %cpsr status register. /jakob

Arnold, Interesting point. This fake use would also need to be probably marked as isUndef(), but I could not foresee all possible corner cases from that. Could it be overly conservative? Would I lose the ability of some sort "predicate value propagation" that I seem to gain from introduction of an explicit flag? Can someone comment? Thanks. Sergei -- Qualcomm Innovation Ce...

...thing like this: - The IsDef flag is implied by the use of the register before the '=', unless it's implicit. - TiedTo and IsEarlyClobber aren't not serialized, as they are defined by the instruction description. (I believe that's true in all cases, but I'm not 100% sure). - IsUndef, IsImp, IsKill, IsDead, IsInternalRead, IsDebug - keywords like 'implicit', 'undef', 'kill', 'dead' are used before the register e.g. 'undef %rax', 'implicit-def kill %eflags'. I don't have a syntax for the SubReg_TargetFlags at the moment. Alex...

I'm working on some enhancements to rematerialization that I hope to contribute. It's mostly working but I am running into one problem. It boils down to having spilled a register used by the remat candidate. I thought this is what getReMatImplicitUse is supposed to handle but it looks inconsistent to me. The comment says this: /// getReMatImplicitUse - If the remat definition MI has

Hi,   For a custom target, there is a pass to perform memory dependence analysis, where, i need to get memory pointer for "load instruction". I want to check the pointer alias behavior. I am getting this by considering the memoperands for the load instruction.   For "load instruction", Machine Instruction dumps as below:   vr12<def> = LD_Iri %vr2<kill>, 0;

Hi Sergei, It seems to me that you can represent the semantics of a conditional instruction by adding a use of the conditionally defined register to the instruction. The value of the output register of an instruction is either the value of the instruction if it was conditionally executed or the value of the output register before the instruction. The Bundle would be: BUNDLE %PC<imp-def>,

Hi, Lately we have come to realize how undef makes our life complicated.. Therefore in this email we propose to change the behavior of a few instruction to yield poison instead of undef in error cases. This follows the suggestion of Eli in https://reviews.llvm.org/D33654. Why is undef so bad? - I believe it's not possible to make newgvn correct with undef. See for example the discussion

...by the use of the register before the '=', >> unless it's implicit. >> - TiedTo and IsEarlyClobber aren't not serialized, as they are defined by >> the instruction description. (I believe that's true in all cases, but I'm >> not 100% sure). >> - IsUndef, IsImp, IsKill, IsDead, IsInternalRead, IsDebug - keywords like >> 'implicit', 'undef', 'kill', 'dead' are used before the register e.g. >> 'undef %rax', 'implicit-def kill %eflags'. >> I don't have a syntax for the SubReg_Target...

...Pranav Bhandarkar <pranavb at codeaurora.org> wrote: > Hi, > > This question relates to the undef flag in the context of sub-register def > operands. > > 1) Firstly, the documentation (comments in the source code) says that in a > sub-register def operand, the "IsUndef" flag refers to the part of the > register that is not written. > 2) Further, the documentation about readsReg() states that a sub-register > def implicitly reads the other parts of the register being redefined unless > the <undef> flag is set. > > Now, I am writing a...

On 7/28/2016 3:37 PM, Xiaochu Liu via llvm-dev wrote: > > I am trying to use liveness of a variable while writing a > machinefunction pass. But it seems that some virtual registers are not > marked as dead while they should be (never used by anything else). I get > those info by callings isDead or isDef function for that MachineOperand > (vreg). Is there a way to get more

...at 2:01 PM, Matthias Braun via llvm-dev <llvm-dev at lists.llvm.org> wrote: > > >> On Jul 28, 2016, at 1:52 PM, Krzysztof Parzyszek <kparzysz at codeaurora.org> wrote: >> >> On 7/28/2016 3:49 PM, Matthias Braun wrote: >>> >>> The isDead and isUndef flags however are required to be correct. >> >> Undef yes, but what relies on isDead being accurate (before live interval computation)? > I only remember Andy/Quentin making those conservative correctness claims about the kill flags but not the dead/undef flags. I am also pretty sur...

Dear there, I am trying to use liveness of a variable while writing a machinefunction pass. But it seems that some virtual registers are not marked as dead while they should be (never used by anything else). I get those info by callings isDead or isDef function for that MachineOperand (vreg). Is there a way to get more accurate liveness info? Thanks, Xiaochu -------------- next part

...e at the new > location. Yes. > Reserved registers without any defs anywhere in the function are > treated as ambient registers that can be read anywhere. These > registers don't get a LiveInterval, and are skipped here: > > // Reserved registers are OK. > if (MO.isUndef() || !lis.hasInterval(MO.getReg())) > continue; Ok, that translates to getReMatImplicitUse pretty well. > Reserved registers with defs get LiveIntervals, and are value-checked > just like virtual registers. Yes. > Also note that unreserved, unallocatable registers exist. For...