search for: isuint

...egen files more flexible and for that I would like to have a name that in the end will be replaced with a type. If tablegen would support c preprocssing, I would do it like this: --- #define myBaseType i32 ... def imm32 : Operand<myBaseType>; def immZExt10 : ImmLeaf<myBaseType, [{return isUInt<10>(Imm);}]>; ... --- Is there a way to achieve something like this with tablegen ? Greetings, Jeroen Dobbelaere

...e SelectionDAG patterns an ImmLeaf is an `imm` node with arbitrary C++ predicate(s) attached. There's no practical way to programatically fold a sext/zext/trunc node into the arbitrary C++ code to allow it to match a plain G_CONSTANT, as well as a zexted/sexted/trunced G_CONSTANT. For example, `isUInt<16>(Imm)` will fail if you want it to match (sext (imm):<<Predicate>>) as if it were (sext (imm)):<<Predicate>> because there's no way to understand that we need to replace the isUInt<16> with isInt<16> when we hoist the predicate up. > Long term, t...

...like > to have a name that in the end will be replaced with a type. > > If tablegen would support c preprocssing, I would do it like this: > > --- > #define myBaseType i32 > ... > def imm32 : Operand<myBaseType>; > def immZExt10 : ImmLeaf<myBaseType, [{return isUInt<10>(Imm);}]>; ... > --- > > Is there a way to achieve something like this with tablegen ? > > Greetings, > > Jeroen Dobbelaere > > > > > > _______________________________________________ > LLVM Developers mailing list > LLVMdev at cs.uiu...

...Type = "OPERAND_IMMEDIATE"; } def uimm16 : Operand<i16> { let PrintMethod = "printUnsignedImm"; let OperandType = "OPERAND_IMMEDIATE"; } def immSExt16x : ImmLeaf<i16, [{ return isInt<16>(Imm); }]>; def immZExt16x : ImmLeaf<i16, [{ return isUInt<16>(Imm); }]>; defm SUB16u_ : ABD_NonCommutative<"sub16u", unsignedSub, LOADRegs, GPRRegs, DSTRegs, i16, i16, i16, simm16, immZExt16x>; multiclass ABD_NonCommutative<string asmstr, SDPatternOperator OpNode, RegisterClass srcAReg, RegisterClass srcBReg,...

...: Operand<i16> { >> let PrintMethod = "printUnsignedImm"; >> let OperandType = "OPERAND_IMMEDIATE"; >> } >> >> def immSExt16x : ImmLeaf<i16, [{ return isInt<16>(Imm); }]>; >> def immZExt16x : ImmLeaf<i16, [{ return isUInt<16>(Imm); }]>; >> >> defm SUB16u_ : ABD_NonCommutative<"sub16u", unsignedSub, LOADRegs, >> GPRRegs, DSTRegs, i16, i16, i16, simm16, immZExt16x>; >> >> multiclass ABD_NonCommutative<string asmstr, SDPatternOperator OpNode, >> Registe...

Hi all, I'm trying to get GlobalISel up and running on an off-tree architecture and am thinking I must be doing something wrong, given by how few things actually work. Namely, any ImmLeaf pattern will fail to match if there is a (TRUNC/ZEXT/SEXT) applied to the constant operand, all of which are commonly created through Legalization. This is due to G_CONSTANT being explicitly looked for by

...llowing the use of an undeclared name is deprecated) /usr/local/include/llvm/Support/MathExtras.h:57: error: there are no arguments to ‘INT64_C’ that depend on a template parameter, so a declaration of ‘INT64_C’ must be available /usr/local/include/llvm/Support/MathExtras.h: In function ‘bool llvm::isUint(uint64_t)’: /usr/local/include/llvm/Support/MathExtras.h:62: error: there are no arguments to ‘UINT64_C’ that depend on a template parameter, so a declaration of ‘UINT64_C’ must be available your any piece of words will be appreciated greatly. Thanks in advance. -------------- next part ----------...

...code, but allowing the use of an undeclared name is deprecated) llvm/include/llvm/Support/MathExtras.h:38: error: there are no arguments to ‘INT64_C’ that depend on a template parameter, so a declaration of ‘INT64_C’ must be available llvm/include/llvm/Support/MathExtras.h: In function ‘bool llvm::isUInt(uint64_t)’: llvm/include/llvm/Support/MathExtras.h:57: error: there are no arguments to ‘UINT64_C’ that depend on a template parameter, so a declaration of ‘UINT64_C’ must be available llvm/include/llvm/Support/MathExtras.h: In function ‘bool llvm::isIntN(unsigned int, int64_t)’: llvm/include/llvm/...

...icated TImmLeafs in TableGen patterns with GlobalISel to select intrinsics with immediate operands. While this is working so far, contrary to ImmLeafs the predicate does not seem to get checked. Is this not supported yet? This is the pattern in question: def tuimm9 : TImmLeaf<i32, [{ return isUInt<9>(Imm); }]>; def : Pat<(int_target_foo tuimm9:$mask), (FOO tuimm9:$mask)>; Match table when using TImmLeaf: GIM_CheckIsImm, Match table when using ImmLeaf: GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_CONSTANT, GIM_CheckI64ImmPredicate, /*MI*/1, /*Predicate*/GIPFP_I64_Predicate_uim...

.../gcc/mingw32/../../../include/llvm/Support/MathExtras.h:57: error: there are no arguments to 'INT64_C' that depend on a template parameter, so a declaration of 'INT64_C' must be available /mingw/lib/gcc/mingw32/../../../include/llvm/Support/MathExtras.h: In function 'bool llvm::isUint(uint64_t)': /mingw/lib/gcc/mingw32/../../../include/llvm/Support/MathExtras.h:62: error: there are no arguments to 'UINT64_C' that depend on a template parameter, so a declaration of 'UINT64_C' must be available -------------- next part -------------- An HTML attachment was scr...

..., DS5, DS6, DS7, DS8, DS9, DS10,DS11, &nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; &nbsp; DS12, DS13, DS14, DS15 &nbsp; )&gt;; &nbsp; def uimm2 : Operand<i32&gt;, ImmLeaf<i32, [{return isUInt<2&gt;(Imm);}]&gt; { &nbsp; let ParserMatchClass = UImmAsmOperand<2&gt;; &nbsp; let DecoderMethod = "decodeUImmOperand<2&gt;"; } &nbsp; possible type contradiction in the pattern below (use -print-records with llvm-tblgen to s...

...DS3, DS4, DS5, DS6, DS7, DS8, DS9, DS10,DS11, &nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; &nbsp; &nbsp; DS12, DS13, DS14, DS15 &nbsp; )&gt;; &nbsp; def uimm2 : Operand<i32&gt;, ImmLeaf<i32, [{return isUInt<2&gt;(Imm);}]&gt; { &nbsp; let ParserMatchClass = UImmAsmOperand<2&gt;; &nbsp; let DecoderMethod = "decodeUImmOperand<2&gt;"; } &nbsp; possible type contradiction in the pattern below (use -print-records with llvm-tblgen to s...

Thanks for your reply. We are propagating sign info to tablegen currently using BinaryWithFlagsSDNode.Flags.hasNoSignedWrap atm. I imagine (I have not looked) they are printed according to instruction in AsmPrinter.cpp (pure speculation). I'm still confused as to why 0x7FFF is ok to match 16 bit int but not 0x8000? Thanks. On Wed, Feb 15, 2017 at 1:44 PM, Manuel Jacob <me at

...DS1, DS2, DS3, DS4, DS5, DS6, DS7, DS8, DS9, DS10,DS11, &nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; &nbsp; &nbsp; &nbsp; DS12, DS13, DS14, DS15 &nbsp; )&gt;; &nbsp; def uimm2 : Operand<i32&gt;, ImmLeaf<i32, [{return isUInt<2&gt;(Imm);}]&gt; { &nbsp; let ParserMatchClass = UImmAsmOperand<2&gt;; &nbsp; let DecoderMethod = "decodeUImmOperand<2&gt;"; } &nbsp; possible type contradiction in the pattern below (use -print-records with llvm-tblgen to s...

...sp; DS0, DS1, DS2, DS3, DS4, DS5, DS6, DS7, DS8, DS9, DS10,DS11, &nbsp;&nbsp;&nbsp;&nbsp;&nbsp; &nbsp; &nbsp; &nbsp; &nbsp; DS12, DS13, DS14, DS15 &nbsp; )&gt;; &nbsp; def uimm2 : Operand<i32&gt;, ImmLeaf<i32, [{return isUInt<2&gt;(Imm);}]&gt; { &nbsp; let ParserMatchClass = UImmAsmOperand<2&gt;; &nbsp; let DecoderMethod = "decodeUImmOperand<2&gt;"; } &nbsp; possible type contradiction in the pattern below (use -print-records with llvm-tblgen to s...

On Tue, Apr 4, 2017 at 12:36 PM, Duncan P. N. Exon Smith < dexonsmith at apple.com> wrote: > > On 2017-Apr-04, at 12:12, Peter Collingbourne <peter at pcc.me.uk> wrote: > > On Mon, Apr 3, 2017 at 8:13 PM, Mehdi Amini <mehdi.amini at apple.com> wrote: > >> >> On Apr 3, 2017, at 7:08 PM, Peter Collingbourne <peter at pcc.me.uk> wrote: >>