Displaying 2 results from an estimated 2 matches for "isuamem32slow".
2015 Aug 31
2
MCRegisterClass mandatory vs preferred alignment?
...gh Agner's instruction tables, it looks like the
aligned and unaligned versions are essentially the same on newer intels
and amds.
I was originally imagining that I'd need a custom hook or flag, but
would it make sense to just use the unaligned versions if the
appropriate feature flag (IsUAMem32Slow) is unset? This would result in
slightly smaller code on newer architectures without (seemingly, I have
no direct experience here) a performance hit.
>
> - Matthias
>
>> On Aug 31, 2015, at 3:21 PM, Philip Reames via llvm-dev <llvm-dev at lists.llvm.org> wrote:
>>
>...
2015 Aug 31
3
MCRegisterClass mandatory vs preferred alignment?
Looking around today, it appears that TargetRegisterClass and
MCRegisterClass only includes a single alignment. This is documented as
being the minimum legal alignment, but it appears to often be greater
than this in practice. For instance, on x86 the alignment of %ymm0 is
listed as 32, not 1. Does anyone know why this is?
Additionally, where are these alignments actually defined? I