Displaying 6 results from an estimated 6 matches for "isswift".
2013 Feb 12
0
[LLVMdev] Is there any llvm neon intrinsic that maps to vmla.f32 instruction ?
...he A9 document clearly states the delays involved
between VMLAs and that this was a solution.
However, due to micro-architecture differences (as David explained), it may
interfere with other non-Swift steps (or the lack of Swift steps) and
produce worse code. It's not uncommon to see "is (isSwift())" around the
code generation or optimization passes.
I haven't done any benchmarking on that particular issue, but if you can
show that the performance regression occur on more than one cortex-A9 core
(ST, TI), than I'd be inclined to suggest only enable VMLx-forward by
default on S...
2013 Feb 12
2
[LLVMdev] Is there any llvm neon intrinsic that maps to vmla.f32 instruction ?
Understood,
Same architecture, different micro-arch (implementation). Could this be the case that vmlx-forwarding make senses for SWIFT and not for ARM Cortex-A9 implementation ? It is enabled by default when -mcpu=cortex-a9 is used but test have made show significant improvements when disabled for cortex-A9 (STEricsson Nova platform).
Best Regards
Seb
From: David Tweed [mailto:david.tweed at
2013 Feb 12
3
[LLVMdev] Is there any llvm neon intrinsic that maps to vmla.f32 instruction ?
...ent clearly states the delays involved between VMLAs and that this was a solution.
>
> However, due to micro-architecture differences (as David explained), it may interfere with other non-Swift steps (or the lack of Swift steps) and produce worse code. It's not uncommon to see "is (isSwift())" around the code generation or optimization passes.
>
> I haven't done any benchmarking on that particular issue, but if you can show that the performance regression occur on more than one cortex-A9 core (ST, TI), than I'd be inclined to suggest only enable VMLx-forward by de...
2013 Feb 12
0
[LLVMdev] RE : Is there any llvm neon intrinsic that maps to vmla.f32 instruction ?
...he A9 document clearly states the delays involved between VMLAs and that this was a solution.
However, due to micro-architecture differences (as David explained), it may interfere with other non-Swift steps (or the lack of Swift steps) and produce worse code. It's not uncommon to see "is (isSwift())" around the code generation or optimization passes.
I haven't done any benchmarking on that particular issue, but if you can show that the performance regression occur on more than one cortex-A9 core (ST, TI), than I'd be inclined to suggest only enable VMLx-forward by default on S...
2013 Jan 09
0
[LLVMdev] ARM vectorizer cost model
...bool Vector) const {
if (Vector) {
if (ST->hasNEON())
return 16;
return 0;
}
if (ST->isThumb1Only())
return 8;
return 16;
}
unsigned getMaximumUnrollFactor() const {
// These are out of order CPUs:
if (ST->isCortexA15() || ST->isSwift())
return 2;
return 1;
}
>
Thanks,
Nadav
>
> cheers,
> --renato
2013 Jan 09
2
[LLVMdev] ARM vectorizer cost model
Hi Nadav,
I'm interested in knowing how you'll work up the ARM cost model and how
easy it'd be to split the work.
As far as I can see, LoopVectorizationCostModel is the class that does all
the work, with assistance from the target transform info.
Do you think that updating ARMTTI would be the best course of action now,
and inspect the differences in the CostModel later?
I also