search for: issuperregister

Displaying 6 results from an estimated 6 matches for "issuperregister".

2015 Dec 04
2
analyzePhysReg question
...pass through into the live-out value. Looking into the code for anaylzePhysReg, I think the code looks like it intends for Defines to truly mean Reg or a super-register of Reg is defined, not any overlapping Reg is defined. The code looks like this: bool IsRegOrSuperReg = MOReg == Reg || TRI->isSuperRegister(MOReg, Reg); ... if (IsRegOrSuperReg) { PRI.Defines = true; // Reg or a super-register is defined. if (!MO.isDead()) AllDefsDead = false; } I think the fundamental bug here is that the operands are swapped when passed into isSuperRegister. The definition of isSuperRegister is /// \br...
2015 Dec 04
2
analyzePhysReg question
...Mask. > Basically, if that helps, > Clobber: The register cannot live through. > Define: (Part of) the register is define by this instruction. Put differently, you can use a register as a definition of an instruction when it is clobbered but not defined. > >> The interface for isSuperRegister >> certainly makes a pretty clear distinction between something being a superRegister and something being an >> overlapping register. What do you think I should be checking to understand the assumptions/expectations better? > > The code :). > >> >>> >>...
2015 Dec 04
2
analyzePhysReg question
...pass through into the live-out value. Looking into the code for anaylzePhysReg, I think the code looks like it intends for Defines to truly mean Reg or a super-register of Reg is defined, not any overlapping Reg is defined. The code looks like this: bool IsRegOrSuperReg = MOReg == Reg || TRI->isSuperRegister(MOReg, Reg); ... if (IsRegOrSuperReg) { PRI.Defines = true; // Reg or a super-register is defined. if (!MO.isDead()) AllDefsDead = false; } I think the fundamental bug here is that the operands are swapped when passed into isSuperRegister. The definition of isSuperRegister is /// \br...
2009 Dec 07
1
[LLVMdev] 2.5 Regalloc Assert
...i_->getAliasSet(PhysReg); *AS; ++AS) // If there are registers which alias PhysReg, but which are not a // sub-register of the chosen representative super register. Assert // since we can't handle it yet. assert(*AS == SpillReg || !allocatableRegs_[*AS] || tri_->isSuperRegister(*AS, SpillReg)); The test also asserts on trunk, though with an error about running out of registers. I am working to file a bug. I am also going to try 2.6. Any hints on what might be going on? -Dave
2015 Dec 04
2
analyzePhysReg question
...me Defines == true is conservatively correct >here. >My guess, but I haven’t checked the code, is that super-register should be >understood as any alias of Reg. > >Worth checking. > >Q. I agree EBX is partly defined, but I think that is what Clobbers is for. The interface for isSuperRegister certainly makes a pretty clear distinction between something being a superRegister and something being an overlapping register. What do you think I should be checking to understand the assumptions/expectations better? > >> >> I wanted to be sure that I wasn't missing something...
2015 Dec 04
2
analyzePhysReg question
I am looking at results from analyzePhysReg, and am getting results a little different than I expected for x86. The call to this is coming from this code in llvm::MachineBasicBlock::computeRegisterLiveness 1163 MachineOperandIteratorBase::PhysRegInfo Analysis = 1164 ConstMIOperands(I).analyzePhysReg(Reg, TRI); The instruction I being analyzed is: %BX<def> = MOV16rm